adder4_translate.v

这是个基于 Xilinx Spartan3 的加法器

// Xilinx Verilog netlist produced by netgen application (version G.35)
// Command      : -intstyle ise -w -ofmt verilog -sim adder4.ngd adder4_translate.v 
// Input file   : adder4.ngd
// Output file  : adder4_translate.v
// Design name  : adder4
// # of Modules : 1
// Xilinx       : D:/Xilinx
// Device       : 2s15cs144-6

// This verilog netlist is a simulation model and uses simulation 
// primitives which may not represent the true implementation of the 
// device, however the netlist is functionally correct and should not 
// be modified. This file cannot be synthesized and should only be used 
// with supported simulation tools.

`timescale 1 ns/1 ps

module adder4 (
  cin, cout, ina, inb, sum
);
  input cin;
  output cout;
  input [3 : 0] ina;
  input [3 : 0] inb;
  output [3 : 0] sum;
  wire cout_OBUF;
  wire ina_0_IBUF;
  wire inb_3_IBUF;
  wire inb_2_IBUF;
  wire cin_IBUF;
  wire inb_0_IBUF;
  wire ina_1_IBUF;
  wire inb_1_IBUF;
  wire sum_3_OBUF;
  wire sum_2_OBUF;
  wire sum_1_OBUF;
  wire sum_0_OBUF;
  wire ina_3_IBUF;
  wire ina_2_IBUF;
  wire N22;
  wire N10;
  wire \adder4_sum<0>_cyo ;
  wire N14;
  wire \adder4_sum<1>_cyo ;
  wire N18;
  wire \adder4_sum<2>_cyo ;
  wire \sum_0_OBUF.GTS.TRI ;
  wire GTS = glbl.GTS;
  wire \sum_1_OBUF.GTS.TRI ;
  wire \cout_OBUF.GTS.TRI ;
  wire \sum_3_OBUF.GTS.TRI ;
  wire \sum_2_OBUF.GTS.TRI ;
  wire \NlwInverterSignal_sum_0_OBUF.GTS.TRI/CTL ;
  wire \NlwInverterSignal_sum_1_OBUF.GTS.TRI/CTL ;
  wire \NlwInverterSignal_cout_OBUF.GTS.TRI/CTL ;
  wire \NlwInverterSignal_sum_3_OBUF.GTS.TRI/CTL ;
  wire \NlwInverterSignal_sum_2_OBUF.GTS.TRI/CTL ;
  X_XOR2 \adder4_sum<3>_xor  (
    .I0(N22),
    .I1(\adder4_sum<2>_cyo ),
    .O(sum_3_OBUF)
  );
  X_BUF sum_0_OBUF_0 (
    .I(sum_0_OBUF),
    .O(\sum_0_OBUF.GTS.TRI )
  );
  X_BUF sum_1_OBUF_1 (
    .I(sum_1_OBUF),
    .O(\sum_1_OBUF.GTS.TRI )
  );
  defparam \adder4_sum<0>lut .INIT = 4'h6;
  X_LUT2 \adder4_sum<0>lut  (
    .ADR0(ina_0_IBUF),
    .ADR1(inb_0_IBUF),
    .O(N10)
  );
  X_MUX2 \adder4_sum<0>cy  (
    .IB(cin_IBUF),
    .IA(ina_0_IBUF),
    .SEL(N10),
    .O(\adder4_sum<0>_cyo )
  );
  X_XOR2 \adder4_sum<0>_xor  (
    .I0(N10),
    .I1(cin_IBUF),
    .O(sum_0_OBUF)
  );
  defparam \adder4_sum<1>lut .INIT = 4'h6;
  X_LUT2 \adder4_sum<1>lut  (
    .ADR0(ina_1_IBUF),
    .ADR1(inb_1_IBUF),
    .O(N14)
  );
  X_MUX2 \adder4_sum<1>cy  (
    .IB(\adder4_sum<0>_cyo ),
    .IA(ina_1_IBUF),
    .SEL(N14),
    .O(\adder4_sum<1>_cyo )
  );
  X_XOR2 \adder4_sum<1>_xor  (
    .I0(N14),
    .I1(\adder4_sum<0>_cyo ),
    .O(sum_1_OBUF)
  );
  defparam \adder4_sum<2>lut .INIT = 4'h6;
  X_LUT2 \adder4_sum<2>lut  (
    .ADR0(ina_2_IBUF),
    .ADR1(inb_2_IBUF),
    .O(N18)
  );
  X_MUX2 \adder4_sum<2>cy  (
    .IB(\adder4_sum<1>_cyo ),
    .IA(ina_2_IBUF),
    .SEL(N18),
    .O(\adder4_sum<2>_cyo )
  );
  X_XOR2 \adder4_sum<2>_xor  (
    .I0(N18),
    .I1(\adder4_sum<1>_cyo ),
    .O(sum_2_OBUF)
  );
  defparam \adder4_sum<3>lut .INIT = 4'h6;
  X_LUT2 \adder4_sum<3>lut  (
    .ADR0(ina_3_IBUF),
    .ADR1(inb_3_IBUF),
    .O(N22)
  );
  X_MUX2 \adder4_sum<3>cy  (
    .IB(\adder4_sum<2>_cyo ),
    .IA(ina_3_IBUF),
    .SEL(N22),
    .O(cout_OBUF)
  );
  X_BUF cin_IBUF_2 (
    .I(cin),
    .O(cin_IBUF)
  );
  X_BUF ina_3_IBUF_3 (
    .I(ina[3]),
    .O(ina_3_IBUF)
  );
  X_BUF ina_2_IBUF_4 (
    .I(ina[2]),
    .O(ina_2_IBUF)
  );
  X_BUF ina_1_IBUF_5 (
    .I(ina[1]),
    .O(ina_1_IBUF)
  );
  X_BUF ina_0_IBUF_6 (
    .I(ina[0]),
    .O(ina_0_IBUF)
  );
  X_BUF inb_3_IBUF_7 (
    .I(inb[3]),
    .O(inb_3_IBUF)
  );
  X_BUF inb_2_IBUF_8 (
    .I(inb[2]),
    .O(inb_2_IBUF)
  );
  X_BUF inb_1_IBUF_9 (
    .I(inb[1]),
    .O(inb_1_IBUF)
  );
  X_BUF inb_0_IBUF_10 (
    .I(inb[0]),
    .O(inb_0_IBUF)
  );
  X_BUF cout_OBUF_11 (
    .I(cout_OBUF),
    .O(\cout_OBUF.GTS.TRI )
  );
  X_BUF sum_3_OBUF_12 (
    .I(sum_3_OBUF),
    .O(\sum_3_OBUF.GTS.TRI )
  );
  X_BUF sum_2_OBUF_13 (
    .I(sum_2_OBUF),
    .O(\sum_2_OBUF.GTS.TRI )
  );
  X_OPAD \sum<0>  (
    .PAD(sum[0])
  );
  X_OPAD \sum<1>  (
    .PAD(sum[1])
  );
  X_IPAD cin_14 (
    .PAD(cin)
  );
  X_IPAD \ina<3>  (
    .PAD(ina[3])
  );
  X_IPAD \ina<2>  (
    .PAD(ina[2])
  );
  X_IPAD \ina<1>  (
    .PAD(ina[1])
  );
  X_IPAD \ina<0>  (
    .PAD(ina[0])
  );
  X_IPAD \inb<3>  (
    .PAD(inb[3])
  );
  X_IPAD \inb<2>  (
    .PAD(inb[2])
  );
  X_IPAD \inb<1>  (
    .PAD(inb[1])
  );
  X_IPAD \inb<0>  (
    .PAD(inb[0])
  );
  X_OPAD cout_15 (
    .PAD(cout)
  );
  X_OPAD \sum<3>  (
    .PAD(sum[3])
  );
  X_OPAD \sum<2>  (
    .PAD(sum[2])
  );
  X_TRI \sum_0_OBUF.GTS.TRI_16  (
    .I(\sum_0_OBUF.GTS.TRI ),
    .CTL(\NlwInverterSignal_sum_0_OBUF.GTS.TRI/CTL ),
    .O(sum[0])
  );
  X_TRI \sum_1_OBUF.GTS.TRI_17  (
    .I(\sum_1_OBUF.GTS.TRI ),
    .CTL(\NlwInverterSignal_sum_1_OBUF.GTS.TRI/CTL ),
    .O(sum[1])
  );
  X_TRI \cout_OBUF.GTS.TRI_18  (
    .I(\cout_OBUF.GTS.TRI ),
    .CTL(\NlwInverterSignal_cout_OBUF.GTS.TRI/CTL ),
    .O(cout)
  );
  X_TRI \sum_3_OBUF.GTS.TRI_19  (
    .I(\sum_3_OBUF.GTS.TRI ),
    .CTL(\NlwInverterSignal_sum_3_OBUF.GTS.TRI/CTL ),
    .O(sum[3])
  );
  X_TRI \sum_2_OBUF.GTS.TRI_20  (
    .I(\sum_2_OBUF.GTS.TRI ),
    .CTL(\NlwInverterSignal_sum_2_OBUF.GTS.TRI/CTL ),
    .O(sum[2])
  );
  X_INV \NlwInverterBlock_sum_0_OBUF.GTS.TRI/CTL  (
    .I(GTS),
    .O(\NlwInverterSignal_sum_0_OBUF.GTS.TRI/CTL )
  );
  X_INV \NlwInverterBlock_sum_1_OBUF.GTS.TRI/CTL  (
    .I(GTS),
    .O(\NlwInverterSignal_sum_1_OBUF.GTS.TRI/CTL )
  );
  X_INV \NlwInverterBlock_cout_OBUF.GTS.TRI/CTL  (
    .I(GTS),
    .O(\NlwInverterSignal_cout_OBUF.GTS.TRI/CTL )
  );
  X_INV \NlwInverterBlock_sum_3_OBUF.GTS.TRI/CTL  (
    .I(GTS),
    .O(\NlwInverterSignal_sum_3_OBUF.GTS.TRI/CTL )
  );
  X_INV \NlwInverterBlock_sum_2_OBUF.GTS.TRI/CTL  (
    .I(GTS),
    .O(\NlwInverterSignal_sum_2_OBUF.GTS.TRI/CTL )
  );
endmodule