adder4.par

这是个基于 Xilinx Spartan3 的加法器

Release 6.3i Par G.35
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

CHOPIN-TRIES::  Sun Dec 18 17:59:35 2005


D:/Xilinx/bin/nt/par.exe -w -intstyle ise -ol std -t 1 adder4_map.ncd
adder4.ncd adder4.pcf 


Constraints file: adder4.pcf

Loading device database for application Par from file "adder4_map.ncd".
   "adder4" is an NCD, version 2.38, device xc2s15, package cs144, speed -6
Loading device for application Par from file '2s15.nph' in environment
D:/Xilinx.
Device speed data version:  PRODUCTION 1.27 2004-06-25.


Device utilization summary:

   Number of External IOBs            14 out of 86     16%
      Number of LOCed External IOBs    0 out of 14      0%

   Number of SLICEs                    2 out of 192     1%




Overall effort level (-ol):   Standard (set by user)
Placer effort level (-pl):    Standard (set by user)
Placer cost table entry (-t): 1
Router effort level (-rl):    Standard (set by user)


Phase 1.1
Phase 1.1 (Checksum:98969d) REAL time: 0 secs 

Phase 2.23
Phase 2.23 (Checksum:1312cfe) REAL time: 0 secs 

Phase 3.3
Phase 3.3 (Checksum:1c9c37d) REAL time: 0 secs 

Phase 4.5
Phase 4.5 (Checksum:26259fc) REAL time: 0 secs 

Phase 5.8
.
Phase 5.8 (Checksum:98d081) REAL time: 0 secs 

Phase 6.5
Phase 6.5 (Checksum:39386fa) REAL time: 0 secs 

Phase 7.18
Phase 7.18 (Checksum:42c1d79) REAL time: 0 secs 

Writing design to file adder4.ncd.

Total REAL time to Placer completion: 0 secs 
Total CPU time to Placer completion: 0 secs 


Phase 1: 15 unrouted;       REAL time: 0 secs 

Phase 2: 15 unrouted;       REAL time: 0 secs 

Phase 3: 0 unrouted;       REAL time: 0 secs 

Phase 4: 0 unrouted;       REAL time: 0 secs 

Total REAL time to Router completion: 0 secs 
Total CPU time to Router completion: 0 secs 

Generating "par" statistics.


   The Delay Summary Report

   The SCORE FOR THIS DESIGN is: 140


The NUMBER OF SIGNALS NOT COMPLETELY ROUTED for this design is: 0

   The AVERAGE CONNECTION DELAY for this design is:        1.144
   The MAXIMUM PIN DELAY IS:                               2.873
   The AVERAGE CONNECTION DELAY on the 10 WORST NETS is:   1.275

   Listing Pin Delays by value: (nsec)

    d < 1.00   < d < 2.00  < d < 3.00  < d < 4.00  < d < 5.00  d >= 5.00
   ---------   ---------   ---------   ---------   ---------   ---------
           7           7           1           0           0           0

Generating Pad Report.

All signals are completely routed.

Total REAL time to PAR completion: 0 secs 
Total CPU time to PAR completion: 0 secs 

Peak Memory Usage:  44 MB

Placement: Completed - No errors found.
Routing: Completed - No errors found.

Writing design to file adder4.ncd.


PAR done.