top.fit.summary

基于FPGA液晶控制器设计与实现

Fitter Status : Successful - Wed Apr 18 03:41:22 2007
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : top
Top-level Entity Name : top
Family : Cyclone
Device : EP1C12Q240C8
Timing Models : Final
Total logic elements : 340 / 12,060 ( 3 % )
Total pins : 13 / 173 ( 8 % )
Total virtual pins : 0
Total memory bits : 0 / 239,616 ( 0 % )
Total PLLs : 1 / 2 ( 50 % )