multigenhd_logo.vhd

SDI接口的源程序,包括扰码编码,并串转换,用VHDL硬件描述语言编写

-------------------------------------------------------------------------------- 
-- Copyright (c) 2004 Xilinx, Inc. 
-- All Rights Reserved 
-------------------------------------------------------------------------------- 
--   ____  ____ 
--  /   /\/   / 
-- /___/  \  /   Vendor: Xilinx 
-- \   \   \/    Author: John F. Snow, Advanced Product Division, Xilinx, Inc.
--  \   \        Filename: $RCSfile: multigenHD_logo.vhd,rcs $
--  /   /        Date Last Modified:  $Date: 2004-12-09 14:59:59-07 $
-- /___/   /\    Date Created: May 28, 2004 
-- \   \  /  \ 
--  \___\/\___\ 
-- 
--
-- Revision History: 
-- $Log: multigenHD_logo.vhd,rcs $
-- Revision 1.1  2004-12-09 14:59:59-07  jsnow
-- Cosmetic changes only.
--
-- Revision 1.0  2004-08-26 15:03:54-06  jsnow
-- Translated from Verilog.
--
-------------------------------------------------------------------------------- 
--   
--   XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" 
--   AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND 
--   SOLUTIONS FOR XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, 
--   OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, 
--   APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION 
--   THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, 
--   AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE 
--   FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY 
--   WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE 
--   IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR 
--   REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF 
--   INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
--   FOR A PARTICULAR PURPOSE. 
--
-------------------------------------------------------------------------------- 
-- This is a modification of the multigenHD module from XAPP682 to include the
-- option to insert a Xilinx logo in the 100% white in the bottom row of the
-- RP219 color bar pattern. Logo insertion is enabled with the insert_logo input.
-- This module requires a slightly modified version of the multigen_horz module
-- that brings the entire horizontal position counter out as a port.
--
-- This colorbar generator will generate color bars for the 13 video standards
-- currently supported by the SMPTE 292M (HD-SDI) video standard. The color bars 
-- comply with SMPTE RP-219 standard color bars, as shown below. This module can
-- also generate the SMPTE RP-198 HD-SDI checkfield test pattern and 75% color
-- bars.
-- 
-- |<-------------------------------------- a ------------------------------------->|
-- |                                                                                |
-- |         |<----------------------------(3/4)a-------------------------->|        |
-- |         |                                                              |        |
-- |   d    |    c        c        c        c        c        c        c    |   d    |
-- +--------+--------+--------+--------+--------+--------+--------+--------+--------+ - - - - -
-- |        |        |        |        |        |        |        |        |        |   ^     ^
-- |        |        |        |        |        |        |        |        |        |   |     |
-- |        |        |        |        |        |        |        |        |        |   |     |
-- |        |        |        |        |        |        |        |        |        |   |     |
-- |        |        |        |        |        |        |        |        |        | (7/12)b |
-- |  40%   |  75%   | YELLOW |  CYAN  |  GREEN | MAGENTA|   RED  |  BLUE  |  40%   |   |     |
-- |  GRAY  | WHITE  |        |        |        |        |        |        |  GRAY  |   |     |
-- |   *1   |        |        |        |        |        |        |        |   *1   |   |     b
-- |        |        |        |        |        |        |        |        |        |   |     |
-- |        |        |        |        |        |        |        |        |        |   |     |
-- |        |        |        |        |        |        |        |        |        |   v     |
-- +--------+--------+--------+--------+--------+--------+--------+--------+--------+ - - -   |
-- |100%CYAN|  *2    |                   75% WHITE                         |100%BLUE| (1/12)b |
-- +--------+--------+-----------------------------------------------------+--------+ - - -   |
-- |100%YELO|  *3    |                    Y-RAMP                           |100% RED| (1/12)b |
-- +--------+--------+---+-----------------+-------+--+--+--+--+--+--------+--------+ - - -   |
-- |        |            |                 |       |  |  |  |  |  |        |        |         |
-- |  15%   |     0%     |       100%      |  0%   |BL|BL|BL|BL|BL|    0%  |  15%   | (3/12)b |
-- |  GRAY  |    BLACK   |      WHITE      | BLACK |K-|K |K+|K |K+|  BLACK |  GRAY  |         |
-- |   *4   |            |                 |       |2%|0%|2%|0%|4%|        |   *4   |         v
-- +--------+------------+-----------------+-------+--+--+--+--+--+--------+--------+ - - - - -
--     d        (3/2)c            2c        (5/6)c  c  c  c  c  c      c       d
--                                               -  -  -  -  -
--                                               3  3  3  3  3
-- 
-- *1: The block marked *1 is 40% Gray for a default value. This value may 
-- optionally be set to any other value in accordance with the operational 
-- requirements of the user.    
--     
-- *2: In the block marked *2, the user may select 75% White, 100% White, +I, or
-- -I.
-- 
-- *3: In the block marked *3, the user may select either 0% Black, or +Q. When 
-- the -I value is selected for the block marked *2, then the +Q signal must be
-- selected for the *3 block.
-- 
-- *4: The block marked *4 is 15% Gray for a default value. This value may
-- optionally be set to any other value in accordance with the operational
-- requirements of the user.
--      
-------------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;

use work.hdsdi_pkg.all;
use work.multigenHD_pkg.all;

library unisim; 
use unisim.vcomponents.all; 

entity multigenHD_logo is
    port (
        clk:        in  std_logic;                      -- video clock
        rst:        in  std_logic;                      -- async resest
        ce:         in  std_logic;                      -- clock enable
        std:        in  std_logic_vector(2 downto 0);   -- video standard select
        pattern:    in  std_logic_vector(1 downto 0);   -- selects pattern type (colorbars or checkfield)
        user_opt:   in  std_logic_vector(1 downto 0);   -- selects colorbars options
        insert_logo:in  std_logic;                      -- 1 = insert xilinx logo
        y:          out hd_video_type;                  -- Y channel output
        c:          out hd_video_type;                  -- C channel output
        h_blank:    out std_logic;                      -- horizontal blanking indicator
        v_blank:    out std_logic;                      -- vertical blanking indicator
        field:      out std_logic;                      -- field indicator
        trs:        out std_logic;                      -- asserted during 4 words of TRS
        xyz:        out std_logic;                      -- asserted during XYZ of TRS
        line_num:   out hd_vpos_type                    -- current vertical line number
    );
end multigenHD_logo;

architecture synth of multigenHD_logo is

-------------------------------------------------------------------------------
-- Logo constants
--
constant LOGO_START_H_1080 : hd_hpos_type               -- starting H position of logo for 1080i/p/sF
    := std_logic_vector(TO_UNSIGNED(616, HD_HCNT_WIDTH));

constant LOGO_START_H_720 : hd_hpos_type                -- starting H position of logo for 720p
    := std_logic_vector(TO_UNSIGNED(365, HD_HCNT_WIDTH));

constant LOGO_START_V0_1080i : hd_vpos_type             -- starting V position of logo for 1080i/sF F=0
    := std_logic_vector(TO_UNSIGNED(472, HD_VCNT_WIDTH));

constant LOGO_START_V1_1080i : hd_vpos_type             -- starting V position of logo for 1080i/sF F=1
    := std_logic_vector(TO_UNSIGNED(1035, HD_VCNT_WIDTH));

constant LOGO_END_V0_1080i : hd_vpos_type               -- ending V position of logo for 1080i/sF F=0
    := std_logic_vector(TO_UNSIGNED(513, HD_VCNT_WIDTH));

constant LOGO_END_V1_1080i : hd_vpos_type               -- ending V position of logo for 1080i/sF F=1
    := std_logic_vector(TO_UNSIGNED(1076, HD_VCNT_WIDTH));

constant LOGO_START_V_1080p : hd_vpos_type              -- starting V position of logo for 1080p
    := std_logic_vector(TO_UNSIGNED(945, HD_VCNT_WIDTH));

constant LOGO_END_V_1080p : hd_vpos_type                -- ending V position of logo for 1080p
    := std_logic_vector(TO_UNSIGNED(1027, HD_VCNT_WIDTH));

constant LOGO_START_V_720p : hd_vpos_type               -- starting V position of logo for 720p
    := std_logic_vector(TO_UNSIGNED(614, HD_VCNT_WIDTH));

constant LOGO_END_V_720p : hd_vpos_type                 -- ending V position of logo for 720p
    := std_logic_vector(TO_UNSIGNED(696, HD_VCNT_WIDTH));

constant LOGO_WIDTH : integer := 274;