hdsdi_rx2.vhd

SDI接口的源程序,包括扰码编码,并串转换,用VHDL硬件描述语言编写

-------------------------------------------------------------------------------- 
-- Copyright (c) 2004 Xilinx, Inc. 
-- All Rights Reserved 
-------------------------------------------------------------------------------- 
--   ____  ____ 
--  /   /\/   / 
-- /___/  \  /   Vendor: Xilinx 
-- \   \   \/    Author: John F. Snow, Advanced Product Division, Xilinx, Inc.
--  \   \        Filename: $RCSfile: hdsdi_rx2.vhd,rcs $
--  /   /        Date Last Modified:  $Date: 2004-12-09 15:17:24-07 $
-- /___/   /\    Date Created: August 25, 2004 
-- \   \  /  \ 
--  \___\/\___\ 
-- 
--
-- Revision History: 
-- $Log: hdsdi_rx2.vhd,rcs $
-- Revision 1.1  2004-12-09 15:17:24-07  jsnow
-- Cosmetic changes only.
--
-- Revision 1.0  2004-08-26 13:39:58-06  jsnow
-- Translated from Verilog.
--
-------------------------------------------------------------------------------- 
--   
--   XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" 
--   AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND 
--   SOLUTIONS FOR XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, 
--   OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, 
--   APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION 
--   THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, 
--   AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE 
--   FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY 
--   WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE 
--   IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR 
--   REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF 
--   INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
--   FOR A PARTICULAR PURPOSE. 
--
-------------------------------------------------------------------------------- 
-- 
-- Description of module:
-- 
-- This is a slightly modified version of the hdsdi_rx module from XAPP681. The
-- line number error checkers have been removed. Both the received line number
-- values and the internally computed line number values are output as ports.
--
-- This module contains the HD-SDI decoder, framer, and CRC checker. The module
-- processes the received data from the RocketIO transceiver, descrambling it, 
-- framing it, and checking for CRC errors.
--   
-- Data coming from the RocketIO receiver is fed into the hdsdi_decoder. The
-- decoder can be bypassed by a MUX if dec_bypass is asserted. The decoded data
-- is then fed into the hdsdi_framer which searches for TRS symbols and reframes
-- all subsequent video words once a TRS symbol has been found. After framing,
-- CRC calculations are done separately on the Y and C channels.
-- 
-- The module has the following control inputs:
-- 
-- dec_bypass: if this input is high, the descrambler is bypassed and the data
-- goes directly from the rxdata port to the framer. This can be used for
-- diagnostic purposes.
-- 
-- frame_en: this is the framer enable input. When this input is high, the 
-- framer is allowed to resynchronize to changes in the bit offset of the TRS 
-- symbols. If this input is low, the framer will not resynchronize to new TRS 
-- offsets and will continue to use the previously discovered offset. This input
-- can be used to filter out erroneous TRS offsets. For example, if the nsp 
-- output of the module is connected to the frame_en input, a single erroneous 
-- TRS will not cause the framer to resynchronize. It takes two consecutive TRS 
-- symbols both a different offsets from the offset currently being used, to 
-- cause the framer to resynchronize. However, if frame_en is tied high, the 
-- framer will immediately resynchronize to any change in TRS offset.
-- 
-- 
-- The module has the following outputs:
-- 
-- c_out, y_out: These 10-bit output ports contain the C and Y channel video 
-- data that has been received, decoded, and framed.
-- 
-- nsp: this is the frame New Start Position output. It is asserted when the
-- starting position of a TRS is found that doesn't match the offset position
-- currently being used by the framer. If the frame_en input to the framer is 
-- high, nsp will only be asserted for a few clock cycles as the framer 
-- resynchronizes. If the frame_en input is low, nsp will stay high until the 
-- frame_en input goes high and a TRS is found, or until a TRS is found that 
-- matches the original offset.
-- 
-- trs: this output is asserted high whenever any of the four words of a TRS
-- symbol are present on the c_out and y_cout ports.
-- 
-- xyz: this output is asserted high during the XYZ word of any TRS symbol.
-- 
-- eav: this output is asserted high during the XYZ word of an EAV symbol.
-- 
-- sav: this output is asserted high during the XYZ word of an SAV symbol.
--  
-- c_ln, y_ln: these output ports will contain the line number information that
-- is captured from the incoming video stream.  The C and Y channels each have 
-- their own line number values stored in the two words immediately after the 
-- EAV symbol. Normally, the LN values for both channels will be exactly the 
-- same.
-- 
-- c_crc_err, y_crc_err: these outputs are asserted when a CRC error is detected.
-- There are separate outputs for each channel. These outputs will be asserted 
-- for one or more clock cycles when there is a CRC error on a line. When 
-- counting errors using these outputs, the counting logic should count rising 
-- edges of the error outputs, not number of clock cycles the signals are 
-- asserted.
-- 
-- c_ln_err, y_ln_err: the hdsdi_autodetect_ln module will generate line numbers
-- internally once the module has locked to the incoming video format. These
-- error outputs are asserted when those internally generated line numbers do 
-- not match the line numbers present in the video stream after the EAV symbols.
-- When the autodetect module knows that it is not locked to the video format, 
-- these outputs are not asserted. However, when the input video changes 
-- formats, there is some latency before the autodetect module recognizes that a
-- format change has occurred. During these latency periods, the c_ln_err and 
-- y_ln_err outputs may become asserted. These outputs are asserted during the 
-- entire line when an error is detected. Leaving these two outputs unconnected 
-- will result in the comparators and the line number generation logic in 
-- hdsdi_autodetect_ln being optimized away, making the receiver smaller.
-- 
-- std: this 4-bit code from the hd_sdi_autodetect module indicates which video
-- format it has detected on the input video stream. See the hdsdi_autodetect_ln
-- module for details.
-- 
-- std_locked: this output is asserted when the hdsdi_autodetect_ln module is
-- locked to the incoming video stream format.
-- 
--------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
use ieee.numeric_std.all;

use work.hdsdi_pkg.all;

entity hdsdi_rx2 is
    port (
        clk:            in  std_logic;          -- receiver clock
        rst:            in  std_logic;          -- async reset
        ce:             in  std_logic;          -- clock enable
        dec_bypass:     in  std_logic;          -- high bypasses the HD-SDI decoder
        frame_en:       in  std_logic;          -- framer enable input
        rxdata:         in  hd_vid20_type;      -- input data bus
        c_out:          out hd_video_type;      -- chroma channel data output
        y_out:          out hd_video_type;      -- luma channel data output
        nsp:            out std_logic;          -- new start position output
        trs:            out std_logic;          -- asserted during TRS symbols
        xyz:            out std_logic;          -- asserted during XYZ word of TRS symbols
        eav:            out std_logic;          -- asserted during XYZ word of an EAV
        sav:            out std_logic;          -- asserted during XYZ word of an SAV
        trs_err:        out std_logic;          -- asserted during XYZ when error is detected
        rx_ln:          out hd_vpos_type;       -- received Y channel line number
        gen_ln:         out hd_vpos_type;       -- internally generated line number
        gen_ln_valid:   out std_logic;          -- internally generated line number is valid
        c_crc_err:      out std_logic;          -- C channel CRC error
        y_crc_err:      out std_logic;          -- Y channel CRC error
        std:            out hd_vidstd_type;     -- 4-bit output code from video format detector
        std_locked:     out std_logic);         -- indicates when std is valid
end hdsdi_rx2;

architecture synth of hdsdi_rx2 is

--
-- Signal declarations
--
signal dec_out :        hd_vid20_type;      -- output of hdsdi_decoder