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Dynamic shift register inference ...=========================================================================HDL Synthesis ReportMacro Statistics# Counters : 4 19-bit up counter : 1 4-bit up counter : 1 12-bit up counter : 1 3-bit up counter : 1# Registers : 26 1-bit register : 8 4-bit register : 18# Latches : 9 7-bit latch : 1 4-bit latch : 8# Comparators : 14 19-bit comparator lessequal : 2 19-bit comparator greatequal : 1 12-bit comparator lessequal : 2 12-bit comparator greatequal : 1 4-bit comparator not equal : 8# Multiplexers : 1 4-bit 8-to-1 multiplexer : 1# Tristates : 2 1-bit tristate buffer : 2==================================================================================================================================================* Low Level Synthesis *=========================================================================INFO:Xst:1907 - HDL ADVISOR - Internal tri-states were detected in your design. You may improve design performance and/or area by replacing them by logic using the 'Convert Tristates to Logic' option.Optimizing unit <mimasuo> ...Optimizing unit <xzq81> ...Optimizing unit <yiwei> ...Optimizing unit <fpq10ms> ...Optimizing unit <keyval> ...Optimizing unit <fpq01ms> ...Optimizing unit <ymq> ...Optimizing unit <bijiaoqi> ...Loading device for application Xst from file 'v50.nph' in environment C:/Xilinx.Mapping all equations...WARNING:Xst:1426 - The value init of the FF/Latch XLXI_24_q hinder the constant cleaning in the block mimasuo. You should achieve better results by setting this init to 0.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_4_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_4_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_5_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_5_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_5_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_6_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_6_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_6_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_7_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_7_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_7_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_8_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_8_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_8_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_1_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_2_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_4_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_3_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_3_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_1_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_2_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_1_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_3_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_1_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_2_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_2_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_8_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_7_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_6_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_3_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_4_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1710 - FF/Latch <XLXI_24_a_5_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_3_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_3_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_3_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_8_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_1_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_1_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_1_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_2_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_3_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_4_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_5_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_6_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_7_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_8_3> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_8_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_8_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_1_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_7_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_7_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_7_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_2_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_6_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_6_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_6_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_2_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_5_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_5_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_5_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_2_2> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_4_0> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_4_1> (without init value) is constant in block <mimasuo>.WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <XLXI_24_b_4_2> (without init value) is constant in block <mimasuo>.Building and optimizing final netlist ...Found area constraint ratio of 100 (+ 5) on block mimasuo, actual ratio is 14.=========================================================================* Final Report *=========================================================================Device utilization summary:---------------------------Selected Device : 2s50tq144-6 Number of Slices: 116 out of 768 15% Number of Slice Flip Flops: 93 out of 1536 6% Number of 4 input LUTs: 163 out of 1536 10% Number of bonded IOBs: 24 out of 96 25% Number of TBUFs: 2 out of 768 0% Number of GCLKs: 1 out of 4 25% =========================================================================TIMING REPORTClock Information:-----------------------------------------------------+------------------------+-------+Clock Signal | Clock buffer(FF name) | Load |-----------------------------------+------------------------+-------+XLXN_19(XLXI_1_I3_0:O) | NONE(*)(XLXI_2_dd_3) | 47 |XLXI_7__n0001(XLXI_7__n00011:O) | NONE(*)(XLXI_7_Q_6) | 7 |CLK | BUFGP | 36 |XLXN_3(XLXI_6_I3_0:O) | NONE(*)(XLXI_3_i_1) | 3 |-----------------------------------+------------------------+-------+(*) These 3 clock signal(s) are generated by combinatorial logic,and XST is not able to identify which are the primary clock signals.Please use the CLOCK_SIGNAL constraint to specify the clock signal(s) generated by combinatorial logic.Timing Summary:---------------Speed Grade: -6 Minimum period: 8.597ns (Maximum Frequency: 116.320MHz) Minimum input arrival time before clock: 8.802ns Maximum output required time after clock: 10.532ns Maximum combinational path delay: No path found=========================================================================Completed process "Synthesize".
Started process "Translate".Command Line: ngdbuild -intstyle ise -dd e:\mimasuo/_ngo -uc YJ.ucf -pxc2s50-tq144-6 mimasuo.ngc mimasuo.ngd Reading NGO file "e:/mimasuo/mimasuo.ngc" ...Reading component libraries for design expansion...Annotating constraints to design from file "YJ.ucf" ...Checking timing specifications ...Checking expanded design ...NGDBUILD Design Results Summary: Number of errors: 0 Number of warnings: 0Total memory usage is 40164 kilobytesWriting NGD file "mimasuo.ngd" ...Writing NGDBUILD log file "mimasuo.bld"...NGDBUILD done.Completed process "Translate".
Project Navigator Auto-Make Log File-------------------------------------
Started process "Create Schematic Symbol".Compiling vhdl file e:/mimasuo/bjq.vhdl in Library work.Entity <bjq> (Architecture <Behavioral>) compiled.tdtfi(vhdl) completed successfully.
Release 6.2i - spl2sym G.28Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.Completed process "Create Schematic Symbol".
Project Navigator Auto-Make Log File-------------------------------------
Started process "Create Schematic Symbol".Compiling vhdl file E:/mimasuo/bjq.vhdl in Library work.ERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 22. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 23. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 24. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 25. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 26. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 27. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 28. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 29. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:3312 - E:/mimasuo/bjq.vhdl Line 55. Undefined symbol 'a'.ERROR:HDLParsers:1209 - E:/mimasuo/bjq.vhdl Line 55. a: Undefined symbol (last report in this block)ERROR:HDLParsers:3312 - E:/mimasuo/bjq.vhdl Line 94. Undefined symbol 'a'.ERROR:HDLParsers:1209 - E:/mimasuo/bjq.vhdl Line 94. a: Undefined symbol (last report in this block)tdtfi(vhdl) completed successfully.
Release 6.2i - spl2sym G.28Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.Completed process "Create Schematic Symbol".
Project Navigator Auto-Make Log File-------------------------------------
Started process "Create Schematic Symbol".Compiling vhdl file E:/mimasuo/bjq.vhdl in Library work.ERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 22. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 23. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 24. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 25. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 26. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 27. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 28. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:164 - E:/mimasuo/bjq.vhdl Line 29. parse error, unexpected OPENPAR, expecting COMMA or COLONERROR:HDLParsers:3312 - E:/mimasuo/bjq.vhdl Line 55. Undefined symbol 'a'.ERROR:HDLParsers:1209 - E:/mimasuo/bjq.vhdl Line 55. a: Undefined symbol (last report in this block)ERROR:HDLParsers:3312 - E:/mimasuo/bjq.vhdl Line 94. Undefined symbol 'a'.ERROR:HDLParsers:1209 - E:/mimasuo/bjq.vhdl Line 94. a: Undefined symbol (last report in this block)tdtfi(vhdl) completed successfully.
Release 6.2i - spl2sym G.28Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.Completed process "Create Schematic Symbol".
Project Navigator Auto-Make Log File-------------------------------------
Started process "Create Schematic Symbol".Compiling vhdl file E:/mimasuo/bjq.vhdl in Library work.Entity <⌨️ 快捷键说明
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