pingche.drc

简易数字频率计

WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net XLXN_25 is sourced by
   a combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.
WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net XLXI_9__n0001 is
   sourced by a combinatorial pin. This is not good design practice. Use the CE
   pin to control the loading of data into the flip-flop.
DRC detected 0 errors and 2 warnings.