clock.hif

VHDL实现数字时钟

Version 6.0 Build 178 04/27/2006 SJ Full Version
35
1724
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
clock
# storage
db|clock.(0).cnf
db|clock.(0).cnf
# case_insensitive
# source_file
clock.bdf
2348b33b4f31586e1e6be248eaf6acc
24
# hierarchies {
|
}
# end
# entity
decode47
# storage
db|clock.(1).cnf
db|clock.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
decode47.vhd
ad5b4f50daf6c8a5ec599d7425be6814
4
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
decode47:inst6
}
# end
# complete