📄 test_double3.fit.qmsg
字号:
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" { } { } 0}
{ "Info" "IFYGR_FYGR_FINISH_LUT_IO_MAC_RAM_PACKING" "" "Info: Finished moving registers into I/Os, LUTs, DSP and RAM blocks" { } { } 0}
{ "Info" "IFYGR_FYGR_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" { } { } 0}
{ "Warning" "WCDB_MGR_CDB_UNATTACHED_ASGN" "" "Warning: Following nodes are assigned to locations or regions, but do not exist in design" { { "Warning" "WCDB_MGR_CDB_UNATTACHED_ASGN_SUB" "ADCS " "Warning: Node ADCS is assigned to location or region, but does not exist in design" { } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "ADCS" } } } } } 0} { "Warning" "WCDB_MGR_CDB_UNATTACHED_ASGN_SUB" "DY " "Warning: Node DY is assigned to location or region, but does not exist in design" { } { { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "DY" } } } } } 0} } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "0 " "Info: Fitter placement preparation operations ending: elapsed time = 0 seconds" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" { } { } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "5.430 ns register memory " "Info: Estimated most critical path is register to memory delay of 5.430 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns generator_accB:inst3\|REG_Q\[7\] 1 REG LAB_X18_Y5 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X18_Y5; Fanout = 6; REG Node = 'generator_accB:inst3\|REG_Q\[7\]'" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { generator_accB:inst3|REG_Q[7] } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/generator_accb.vhd" "" "" { Text "G:/ywh/QUARTUSII/sinWAVEgenerator/generator_accb.vhd" 40 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.054 ns) + CELL(0.575 ns) 1.629 ns generator_add:inst4\|add~2COUT1 2 COMB LAB_X19_Y4 2 " "Info: 2: + IC(1.054 ns) + CELL(0.575 ns) = 1.629 ns; Loc. = LAB_X19_Y4; Fanout = 2; COMB Node = 'generator_add:inst4\|add~2COUT1'" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "1.629 ns" { generator_accB:inst3|REG_Q[7] generator_add:inst4|add~2COUT1 } "NODE_NAME" } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.709 ns generator_add:inst4\|add~3COUT1 3 COMB LAB_X19_Y4 2 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 1.709 ns; Loc. = LAB_X19_Y4; Fanout = 2; COMB Node = 'generator_add:inst4\|add~3COUT1'" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "0.080 ns" { generator_add:inst4|add~2COUT1 generator_add:inst4|add~3COUT1 } "NODE_NAME" } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.789 ns generator_add:inst4\|add~4COUT1 4 COMB LAB_X19_Y4 2 " "Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 1.789 ns; Loc. = LAB_X19_Y4; Fanout = 2; COMB Node = 'generator_add:inst4\|add~4COUT1'" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "0.080 ns" { generator_add:inst4|add~3COUT1 generator_add:inst4|add~4COUT1 } "NODE_NAME" } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.869 ns generator_add:inst4\|add~5COUT1 5 COMB LAB_X19_Y4 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 1.869 ns; Loc. = LAB_X19_Y4; Fanout = 2; COMB Node = 'generator_add:inst4\|add~5COUT1'" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "0.080 ns" { generator_add:inst4|add~4COUT1 generator_add:inst4|add~5COUT1 } "NODE_NAME" } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 2.127 ns generator_add:inst4\|add~6COUT 6 COMB LAB_X19_Y4 4 " "Info: 6: + IC(0.000 ns) + CELL(0.258 ns) = 2.127 ns; Loc. = LAB_X19_Y4; Fanout = 4; COMB Node = 'generator_add:inst4\|add~6COUT'" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "0.258 ns" { generator_add:inst4|add~5COUT1 generator_add:inst4|add~6COUT } "NODE_NAME" } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.679 ns) 2.806 ns generator_add:inst4\|add~9 7 COMB LAB_X19_Y4 1 " "Info: 7: + IC(0.000 ns) + CELL(0.679 ns) = 2.806 ns; Loc. = LAB_X19_Y4; Fanout = 1; COMB Node = 'generator_add:inst4\|add~9'" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "0.679 ns" { generator_add:inst4|add~6COUT generator_add:inst4|add~9 } "NODE_NAME" } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.612 ns) + CELL(0.590 ns) 4.008 ns generator_add:inst4\|add~54 8 COMB LAB_X17_Y4 8 " "Info: 8: + IC(0.612 ns) + CELL(0.590 ns) = 4.008 ns; Loc. = LAB_X17_Y4; Fanout = 8; COMB Node = 'generator_add:inst4\|add~54'" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "1.202 ns" { generator_add:inst4|add~9 generator_add:inst4|add~54 } "NODE_NAME" } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.039 ns) + CELL(0.383 ns) 5.430 ns lpm_rom0:inst\|altsyncram:altsyncram_component\|altsyncram_ccr:auto_generated\|ram_block1a7~porta_address_reg7 9 MEM M4K_X13_Y4 1 " "Info: 9: + IC(1.039 ns) + CELL(0.383 ns) = 5.430 ns; Loc. = M4K_X13_Y4; Fanout = 1; MEM Node = 'lpm_rom0:inst\|altsyncram:altsyncram_component\|altsyncram_ccr:auto_generated\|ram_block1a7~porta_address_reg7'" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "1.422 ns" { generator_add:inst4|add~54 lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_ccr:auto_generated|ram_block1a7~porta_address_reg7 } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/altsyncram_ccr.tdf" "" "" { Text "G:/ywh/QUARTUSII/sinWAVEgenerator/db/altsyncram_ccr.tdf" 171 2 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.725 ns 50.18 % " "Info: Total cell delay = 2.725 ns ( 50.18 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.705 ns 49.82 % " "Info: Total interconnect delay = 2.705 ns ( 49.82 % )" { } { } 0} } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "5.430 ns" { generator_accB:inst3|REG_Q[7] generator_add:inst4|add~2COUT1 generator_add:inst4|add~3COUT1 generator_add:inst4|add~4COUT1 generator_add:inst4|add~5COUT1 generator_add:inst4|add~6COUT generator_add:inst4|add~9 generator_add:inst4|add~54 lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_ccr:auto_generated|ram_block1a7~porta_address_reg7 } "NODE_NAME" } } } } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PLACER_ESTIMATED_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Info: Estimated interconnect usage is 2% of the available device resources" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "1 " "Info: Fitter placement operations ending: elapsed time = 1 seconds" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "0 " "Info: Fitter routing operations ending: elapsed time = 0 seconds" { } { } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" { } { } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" { } { } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" { } { } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" { } { } 0}
{ "Warning" "WFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "4 " "Warning: Following 4 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "XFER GND " "Info: Pin XFER has GND driving its datain port" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 440 1280 1456 456 "XFER" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "XFER" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { XFER } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { XFER } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "DA1CS GND " "Info: Pin DA1CS has GND driving its datain port" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 392 1280 1456 408 "DA1CS" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "DA1CS" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { DA1CS } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { DA1CS } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "DA2CS GND " "Info: Pin DA2CS has GND driving its datain port" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 408 1280 1456 424 "DA2CS" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "DA2CS" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { DA2CS } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { DA2CS } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "WRN GND " "Info: Pin WRN has GND driving its datain port" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 424 1280 1456 440 "WRN" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "WRN" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { WRN } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { WRN } "NODE_NAME" } } } 0} } { } 0}
{ "Info" "IFSAC_FSAC_ALL_OUTPUT_ENABLE_GROUPS" "" "Info: Following groups of pins have the same output enable" { { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP" "BUS_51:inst9\|GX " "Info: Following pins have the same output enable: BUS_51:inst9\|GX" { { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional P0\[7\] LVTTL " "Info: Type bidirectional pin P0\[7\] uses the LVTTL I/O standard" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 216 88 264 232 "P0\[7..0\]" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "P0\[7\]" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { P0[7] } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { P0[7] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional P0\[6\] LVTTL " "Info: Type bidirectional pin P0\[6\] uses the LVTTL I/O standard" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 216 88 264 232 "P0\[7..0\]" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "P0\[6\]" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { P0[6] } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { P0[6] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional P0\[5\] LVTTL " "Info: Type bidirectional pin P0\[5\] uses the LVTTL I/O standard" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 216 88 264 232 "P0\[7..0\]" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "P0\[5\]" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { P0[5] } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { P0[5] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional P0\[4\] LVTTL " "Info: Type bidirectional pin P0\[4\] uses the LVTTL I/O standard" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 216 88 264 232 "P0\[7..0\]" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "P0\[4\]" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { P0[4] } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { P0[4] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional P0\[3\] LVTTL " "Info: Type bidirectional pin P0\[3\] uses the LVTTL I/O standard" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 216 88 264 232 "P0\[7..0\]" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "P0\[3\]" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { P0[3] } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { P0[3] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional P0\[2\] LVTTL " "Info: Type bidirectional pin P0\[2\] uses the LVTTL I/O standard" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 216 88 264 232 "P0\[7..0\]" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "P0\[2\]" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { P0[2] } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { P0[2] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional P0\[1\] LVTTL " "Info: Type bidirectional pin P0\[1\] uses the LVTTL I/O standard" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 216 88 264 232 "P0\[7..0\]" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "P0\[1\]" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { P0[1] } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { P0[1] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_SAME_OUTPUT_ENABLE_GROUP_SUB" "bidirectional P0\[0\] LVTTL " "Info: Type bidirectional pin P0\[0\] uses the LVTTL I/O standard" { } { { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" "" "" { Schematic "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.bdf" { { 216 88 264 232 "P0\[7..0\]" "" } } } } { "d:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "d:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "P0\[0\]" } } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" "" "" { Report "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3_cmp.qrpt" Compiler "test_double3" "UNKNOWN" "V1" "G:/ywh/QUARTUSII/sinWAVEgenerator/db/test_double3.quartus_db" { Floorplan "" "" "" { P0[0] } "NODE_NAME" } } } { "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { Floorplan "G:/ywh/QUARTUSII/sinWAVEgenerator/test_double3.fld" "" "" { P0[0] } "NODE_NAME" } } } 0} } { } 0} } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 4 s " "Info: Quartus II Fitter was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Aug 20 15:13:06 2005 " "Info: Processing ended: Sat Aug 20 15:13:06 2005" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:08 " "Info: Elapsed time: 00:00:08" { } { } 0} } { } 0}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -