test_double3.hif

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d:|altera|quartus41|libraries|megafunctions|lpm_counter.tdf
1088009428
6
# storage
db|test_double3.(13).cnf
db|test_double3.(13).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
4
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_0b7
PARAMETER_UNKNOWN
USR
}
# used_port {
clock
q0
q1
q2
q3
sclr
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|lpm_constant.inc
1081478554
d:|altera|quartus41|libraries|megafunctions|lpm_decode.inc
1081478592
d:|altera|quartus41|libraries|megafunctions|lpm_add_sub.inc
1081478464
d:|altera|quartus41|libraries|megafunctions|cmpconst.inc
1081478088
d:|altera|quartus41|libraries|megafunctions|lpm_compare.inc
1081478538
d:|altera|quartus41|libraries|megafunctions|lpm_counter.inc
1081478574
d:|altera|quartus41|libraries|megafunctions|dffeea.inc
1081478268
d:|altera|quartus41|libraries|megafunctions|alt_synch_counter.inc
1081477038
d:|altera|quartus41|libraries|megafunctions|alt_synch_counter_f.inc
1081477054
d:|altera|quartus41|libraries|megafunctions|alt_counter_f10ke.inc
1081476700
d:|altera|quartus41|libraries|megafunctions|alt_counter_stratix.inc
1081476712
d:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
}
# end
# entity
cntr_0b7
# case_insensitive
# source_file
db|cntr_0b7.tdf
1124518257
6
# storage
db|test_double3.(14).cnf
db|test_double3.(14).cnf
# used_port {
clock
sclr
q0
q1
q2
q3
}
# end
# entity
lpm_rom0
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
lpm_rom0.vhd
1124519327
4
# storage
db|test_double3.(15).cnf
db|test_double3.(15).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
altsyncram
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|altsyncram.tdf
1088009418
6
# storage
db|test_double3.(16).cnf
db|test_double3.(16).cnf
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
8
PARAMETER_DEC
USR
WIDTHAD_A
9
PARAMETER_DEC
USR
NUMWORDS_A
512
PARAMETER_DEC
USR
OUTDATA_REG_A
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
INIT_FILE
Sin512.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
512
PARAMETER_DEC
USR
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_ccr
PARAMETER_UNKNOWN
USR
}
# used_port {
address_a0
address_a1
address_a2
address_a3
address_a4
address_a5
address_a6
address_a7
address_a8
clock0
q_a0
q_a1
q_a2
q_a3
q_a4
q_a5
q_a6
q_a7
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|stratix_ram_block.inc
1081479498
d:|altera|quartus41|libraries|megafunctions|lpm_mux.inc
1081478758
d:|altera|quartus41|libraries|megafunctions|lpm_decode.inc
1081478592
d:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
d:|altera|quartus41|libraries|megafunctions|altsyncram.inc
1081477654
d:|altera|quartus41|libraries|megafunctions|a_rdenreg.inc
1081476578
d:|altera|quartus41|libraries|megafunctions|altrom.inc
1081477590
d:|altera|quartus41|libraries|megafunctions|altram.inc
1081477560
d:|altera|quartus41|libraries|megafunctions|altdpram.inc
1081477328
d:|altera|quartus41|libraries|megafunctions|altqpram.inc
1081477546
}
# end
# entity
altsyncram_ccr
# case_insensitive
# source_file
db|altsyncram_ccr.tdf
1124519480
6
# storage
db|test_double3.(17).cnf
db|test_double3.(17).cnf
# used_port {
address_a0
address_a1
address_a2
address_a3
address_a4
address_a5
address_a6
address_a7
address_a8
clock0
q_a0
q_a1
q_a2
q_a3
q_a4
q_a5
q_a6
q_a7
}
# memory_file {
Sin512.mif
1124066040
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|lpm_counter.tdf
1088009428
6
# storage
db|test_double3.(18).cnf
db|test_double3.(18).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
7
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_ha7
PARAMETER_UNKNOWN
USR
}
# used_port {
aclr
clock
q0
q1
q2
q3
q4
q5
q6
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|lpm_constant.inc
1081478554
d:|altera|quartus41|libraries|megafunctions|lpm_decode.inc
1081478592
d:|altera|quartus41|libraries|megafunctions|lpm_add_sub.inc
1081478464
d:|altera|quartus41|libraries|megafunctions|cmpconst.inc
1081478088
d:|altera|quartus41|libraries|megafunctions|lpm_compare.inc
1081478538
d:|altera|quartus41|libraries|megafunctions|lpm_counter.inc
1081478574
d:|altera|quartus41|libraries|megafunctions|dffeea.inc
1081478268
d:|altera|quartus41|libraries|megafunctions|alt_synch_counter.inc
1081477038
d:|altera|quartus41|libraries|megafunctions|alt_synch_counter_f.inc
1081477054
d:|altera|quartus41|libraries|megafunctions|alt_counter_f10ke.inc
1081476700
d:|altera|quartus41|libraries|megafunctions|alt_counter_stratix.inc
1081476712
d:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
}
# end
# entity
cntr_ha7
# case_insensitive
# source_file
db|cntr_ha7.tdf
1124519653
6
# storage
db|test_double3.(19).cnf
db|test_double3.(19).cnf
# used_port {
clock
aclr
q0
q1
q2
q3
q4
q5
q6
}
# end
# entity
BUSTRI
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
BUSTRI.vhd
1124521419
4
# storage
db|test_double3.(8).cnf
db|test_double3.(8).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
BUS_51
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
BUS_51.vhd
1124521813
4
# storage
db|test_double3.(1).cnf
db|test_double3.(1).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# end
# entity
test_double3
# case_insensitive
# source_file
test_double3.bdf
1124521968
23
# storage
db|test_double3.(0).cnf
db|test_double3.(0).cnf
# end
# complete