ver-highspeed_io_readme-v1.0.0p1.txt

这个verilog代码是一个输入输出经典的例子。大家一起参考。

Implementing High-Speed Differential I/O Capability in Stratix Devices v1.0.0 README File

This readme file for the Implementing High-Speed Differential I/O Capability in Stratix 
Devices includes information that was not incorporated into the web page.

Ensure that you have read the information on the High-Speed Differential I/O 
design example at http://www.altera.com/support/examples/exm-index.html, and 
the section "Advanced I/O Standard Support" in the Stratix FPGA Family Data 
Sheet at http://www.altera.com/literature/ds/ds_stx.pdf, before using the example.

This file contains the following information:

o  Package Contents
o  Software Tool Requirements
o  Release History
o  Contacting Altera

Package Contents
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