ddr_cntl_a_fpga_editor.log

arm控制FPGA的DDR测试代码

#:C49    
#Xilinx FPGA Editor Command Log File
#Editor Version:
#:V   NT M2.1 I.24
#Current Working Directory:
#:D   E:\hardware\KDVM26402\fpga\ddr_cntl_a_withtb
#Date/Time:
#:T   Thu Mar 22 14:01:25 2007
#------------------------------
	#Reading ddr_cntl_a.ncd...
	#Loading device for application Rf_Device from file '3s4000.nph' in environment D:\hardware\Xilinx;D:\hardware\Xilinx.
	#   "ddr_cntl_a" is an NCD, version 3.1, device xc3s4000, package fg900, speed -5
	#Building chip graphics...
	#Loading speed info...
	#1
setattr main edit-mode no-logic-changes
	#2
post find
	#3
setattr find  type site  name R21
	#4
unselect -all
	#5
select -k site R21 
	#6
unpost find
	#7
unselect -all
	#8
select net 'infrastructure_top0/sys_clk_ibuf'
	#net "infrastructure_top0/sys_clk_ibuf"
	#9
post find
	#10
setattr find  type net  name b_ck
	#11
unselect -all
	#12
select -k net b_ck 
	#WARNING:FPGAEditor:46 - No net has a name that matches the pattern "b_ck".
	#13
unpost find
	#14
post find
	#15
setattr find  type net  name cntrl0_DDR_CK
	#16
unselect -all
	#17
select -k net cntrl0_DDR_CK 
	#WARNING:FPGAEditor:46 - No net has a name that matches the pattern "cntrl0_DDR_CK".
	#18
setattr find  type net 
	#19
unselect -all
	#20
select -k net cntrl0_DDR_CK 
	#WARNING:FPGAEditor:46 - No net has a name that matches the pattern "cntrl0_DDR_CK".
	#21
setattr find  type net  name cntrl0_DDR_CK\*
	#22
unselect -all
	#23
select -k net cntrl0_DDR_CK* 
	#WARNING:FPGAEditor:46 - No net has a name that matches the pattern "cntrl0_DDR_CK*".
	#24
setattr find  type net 
	#25
unselect -all
	#26
select -k net cntrl0_DDR_CK* 
	#WARNING:FPGAEditor:46 - No net has a name that matches the pattern "cntrl0_DDR_CK*".
	#27
setattr find  type net 
	#28
unselect -all
	#29
select -k net cntrl0_DDR_CK* 
	#WARNING:FPGAEditor:46 - No net has a name that matches the pattern "cntrl0_DDR_CK*".
	#30
unpost find
	#31
select -k comp 'cntrl0_DDR_CK<0>'
	#32
unselect -all
	#33
select comp 'cntrl0_DDR_CK<0>'
	#comp "cntrl0_DDR_CK<0>",  site "V10",  bonded type = IOB,  pad name = PAD618,  pin name = V10  (RPM grid X0Y132)
	#34
unselect -all
	#35
select comp 'cntrl0_DDR_CK<0>'
	#comp "cntrl0_DDR_CK<0>",  site "V10",  bonded type = IOB,  pad name = PAD618,  pin name = V10  (RPM grid X0Y132)
	#36
post block
	#37
unselect -all
	#38
select net 'clk_0'
	#net "clk_0"
	#39
unselect -all
	#40
select comp 'infrastructure_top0/clk_dcm0/DCM_INST1'
	#comp "infrastructure_top0/clk_dcm0/DCM_INST1",  site "DCM_X1Y1",  type = DCM  (RPM grid X212Y391)
	#41
unselect -all
	#42
select comp 'infrastructure_top0/clk_dcm0/DCM_INST1'
	#comp "infrastructure_top0/clk_dcm0/DCM_INST1",  site "DCM_X1Y1",  type = DCM  (RPM grid X212Y391)
	#43
unselect -all
	#44
select comp 'infrastructure_top0/clk_dcm0/DCM_INST1'
	#comp "infrastructure_top0/clk_dcm0/DCM_INST1",  site "DCM_X1Y1",  type = DCM  (RPM grid X212Y391)
	#45
unselect -all
	#46
select comp 'infrastructure_top0/clk_dcm0/DCM_INST1'
	#comp "infrastructure_top0/clk_dcm0/DCM_INST1",  site "DCM_X1Y1",  type = DCM  (RPM grid X212Y391)
	#47
post block
	#48
unselect -all
	#49
select net 'clk_0'
	#net "clk_0"
	#50
unselect -all
	#51
unselect -all
	#52
unselect -all