clock_vhd.sdo

基于SMART-I实验平台的时钟电路设计与实现

// Copyright (C) 1991-2006 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EP1C3T144C6 Package TQFP144
// 

// 
// This SDF file should be used for Active-HDL (VHDL) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "clock")
  (DATE "11/04/2006 14:20:49")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "cyclone_asynch_io")
    (INSTANCE \\clk\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1130:1130:1130) (1130:1130:1130))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\clk_counter_1h\~I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (339:339:339) (345:345:345))
        (PORT datab (431:431:431) (425:425:425))
        (PORT datac (442:442:442) (453:453:453))
        (PORT datad (492:492:492) (469:469:469))
        (IOPATH dataa regin (568:568:568) (568:568:568))
        (IOPATH datab regin (467:467:467) (467:467:467))
        (IOPATH datac regin (368:368:368) (368:368:368))
        (IOPATH datad regin (238:238:238) (238:238:238))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\clk_counter_1h\~I\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (691:691:691) (691:691:691))
        (PORT clk (3495:3495:3495) (3598:3598:3598))
        (PORT ena (1505:1505:1505) (1569:1569:1569))
        (IOPATH (posedge clk) regout (173:173:173) (173:173:173))
        (IOPATH (posedge aclr) regout (218:218:218) (218:218:218))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (29:29:29))
      (SETUP ena (posedge clk) (29:29:29))
      (HOLD datain (posedge clk) (12:12:12))
      (HOLD ena (posedge clk) (12:12:12))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\clk_counter_10s\~I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (454:454:454) (448:448:448))
        (PORT datab (349:349:349) (345:345:345))
        (PORT datac (400:400:400) (422:422:422))
        (PORT datad (477:477:477) (456:456:456))
        (IOPATH dataa regin (568:568:568) (568:568:568))
        (IOPATH datab regin (467:467:467) (467:467:467))
        (IOPATH datac regin (368:368:368) (368:368:368))
        (IOPATH datad regin (238:238:238) (238:238:238))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\clk_counter_10s\~I\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (691:691:691) (691:691:691))
        (PORT clk (1009:1009:1009) (995:995:995))
        (PORT ena (1543:1543:1543) (1605:1605:1605))
        (IOPATH (posedge clk) regout (173:173:173) (173:173:173))
        (IOPATH (posedge aclr) regout (218:218:218) (218:218:218))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (29:29:29))
      (SETUP ena (posedge clk) (29:29:29))
      (HOLD datain (posedge clk) (12:12:12))
      (HOLD ena (posedge clk) (12:12:12))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\clk_counter_10h\~I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (399:399:399) (409:409:409))
        (PORT datab (1395:1395:1395) (1433:1433:1433))
        (PORT datac (342:342:342) (359:359:359))
        (PORT datad (550:550:550) (548:548:548))
        (IOPATH dataa regin (568:568:568) (568:568:568))
        (IOPATH datab regin (467:467:467) (467:467:467))
        (IOPATH datac regin (368:368:368) (368:368:368))
        (IOPATH datad regin (238:238:238) (238:238:238))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\clk_counter_10h\~I\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (691:691:691) (691:691:691))
        (PORT clk (4186:4186:4186) (4222:4222:4222))
        (PORT ena (1530:1530:1530) (1591:1591:1591))
        (IOPATH (posedge clk) regout (173:173:173) (173:173:173))
        (IOPATH (posedge aclr) regout (218:218:218) (218:218:218))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (29:29:29))
      (SETUP ena (posedge clk) (29:29:29))
      (HOLD datain (posedge clk) (12:12:12))
      (HOLD ena (posedge clk) (12:12:12))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\clk_counter_10m\~I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (420:420:420) (424:424:424))
        (PORT datab (296:296:296) (307:307:307))
        (PORT datac (407:407:407) (426:426:426))
        (PORT datad (469:469:469) (448:448:448))
        (IOPATH dataa regin (568:568:568) (568:568:568))
        (IOPATH datab regin (467:467:467) (467:467:467))
        (IOPATH datac regin (368:368:368) (368:368:368))
        (IOPATH datad regin (238:238:238) (238:238:238))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\clk_counter_10m\~I\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (691:691:691) (691:691:691))
        (PORT clk (3312:3312:3312) (3399:3399:3399))
        (PORT ena (1518:1518:1518) (1579:1579:1579))
        (IOPATH (posedge clk) regout (173:173:173) (173:173:173))
        (IOPATH (posedge aclr) regout (218:218:218) (218:218:218))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (29:29:29))
      (SETUP ena (posedge clk) (29:29:29))
      (HOLD datain (posedge clk) (12:12:12))
      (HOLD ena (posedge clk) (12:12:12))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\clk_counter_1m\~I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (460:460:460) (453:453:453))
        (PORT datab (295:295:295) (307:307:307))
        (PORT datac (414:414:414) (434:434:434))
        (PORT datad (438:438:438) (429:429:429))
        (IOPATH dataa regin (568:568:568) (568:568:568))
        (IOPATH datab regin (467:467:467) (467:467:467))
        (IOPATH datac regin (368:368:368) (368:368:368))
        (IOPATH datad regin (238:238:238) (238:238:238))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\clk_counter_1m\~I\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (691:691:691) (691:691:691))
        (PORT clk (3871:3871:3871) (3964:3964:3964))
        (PORT ena (1518:1518:1518) (1579:1579:1579))
        (IOPATH (posedge clk) regout (173:173:173) (173:173:173))
        (IOPATH (posedge aclr) regout (218:218:218) (218:218:218))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (29:29:29))
      (SETUP ena (posedge clk) (29:29:29))
      (HOLD datain (posedge clk) (12:12:12))
      (HOLD ena (posedge clk) (12:12:12))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\process4\~39_I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (439:439:439) (438:438:438))
        (PORT datab (555:555:555) (560:560:560))
        (PORT datad (800:800:800) (841:841:841))
        (IOPATH dataa combout (454:454:454) (454:454:454))
        (IOPATH datab combout (340:340:340) (340:340:340))
        (IOPATH datad combout (88:88:88) (88:88:88))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\Equal6\~38_I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (433:433:433) (446:446:446))
        (PORT datad (475:475:475) (456:456:456))
        (IOPATH datac combout (225:225:225) (225:225:225))
        (IOPATH datad combout (88:88:88) (88:88:88))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\Equal0\~38_I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (462:462:462) (467:467:467))
        (PORT datad (465:465:465) (453:453:453))
        (IOPATH datac combout (225:225:225) (225:225:225))
        (IOPATH datad combout (88:88:88) (88:88:88))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\Equal4\~38_I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (432:432:432) (444:444:444))
        (PORT datad (453:453:453) (442:442:442))
        (IOPATH datac combout (225:225:225) (225:225:225))
        (IOPATH datad combout (88:88:88) (88:88:88))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\Equal2\~38_I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (416:416:416) (417:417:417))
        (PORT datac (462:462:462) (467:467:467))
        (IOPATH datab combout (340:340:340) (340:340:340))
        (IOPATH datac combout (225:225:225) (225:225:225))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\sel_temp\[0\]\~I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datad (457:457:457) (446:446:446))
        (IOPATH datad regin (238:238:238) (238:238:238))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\sel_temp\[0\]\~I\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (691:691:691) (691:691:691))
        (PORT clk (1009:1009:1009) (995:995:995))
        (IOPATH (posedge clk) regout (173:173:173) (173:173:173))
        (IOPATH (posedge aclr) regout (218:218:218) (218:218:218))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (29:29:29))
      (HOLD datain (posedge clk) (12:12:12))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\sel_temp\[1\]\~I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (458:458:458) (468:468:468))
        (PORT datad (458:458:458) (447:447:447))
        (IOPATH datac regin (368:368:368) (368:368:368))
        (IOPATH datad regin (238:238:238) (238:238:238))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\sel_temp\[1\]\~I\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (691:691:691) (691:691:691))
        (PORT clk (1009:1009:1009) (995:995:995))
        (IOPATH (posedge clk) regout (173:173:173) (173:173:173))
        (IOPATH (posedge aclr) regout (218:218:218) (218:218:218))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (29:29:29))
      (HOLD datain (posedge clk) (12:12:12))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\sel_temp\[2\]\~I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (443:443:443) (437:437:437))
        (PORT datac (455:455:455) (463:463:463))
        (PORT datad (457:457:457) (446:446:446))
        (IOPATH datab regin (467:467:467) (467:467:467))
        (IOPATH datac regin (368:368:368) (368:368:368))
        (IOPATH datad regin (238:238:238) (238:238:238))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\sel_temp\[2\]\~I\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (691:691:691) (691:691:691))
        (PORT clk (1009:1009:1009) (995:995:995))
        (IOPATH (posedge clk) regout (173:173:173) (173:173:173))
        (IOPATH (posedge aclr) regout (218:218:218) (218:218:218))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (29:29:29))
      (HOLD datain (posedge clk) (12:12:12))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\Mux4\~24_I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (445:445:445) (439:439:439))
        (PORT datac (454:454:454) (463:463:463))
        (PORT datad (457:457:457) (445:445:445))
        (IOPATH datab combout (340:340:340) (340:340:340))
        (IOPATH datac combout (225:225:225) (225:225:225))
        (IOPATH datad combout (88:88:88) (88:88:88))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_io")
    (INSTANCE \\reset\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio combout (1130:1130:1130) (1130:1130:1130))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\clk_10s\[0\]\~I\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (459:459:459) (465:465:465))
        (IOPATH datac regin (368:368:368) (368:368:368))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\clk_10s\[0\]\~I\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (1143:1143:1143) (1158:1158:1158))
        (PORT clk (3871:3871:3871) (3964:3964:3964))
        (IOPATH (posedge clk) regout (173:173:173) (173:173:173))
        (IOPATH (posedge aclr) regout (218:218:218) (218:218:218))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (29:29:29))
      (HOLD datain (posedge clk) (12:12:12))