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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd 6 2 " "Info: Found 6 design units, including 2 entities, in source file e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 HUB_PACK " "Info: Found design unit 1: HUB_PACK" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "HUB_PACK" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 49 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 JTAG_PACK " "Info: Found design unit 2: JTAG_PACK" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "JTAG_PACK" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 63 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 sld_hub-rtl " "Info: Found design unit 3: sld_hub-rtl" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "sld_hub-rtl" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 166 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "4 sld_jtag_state_machine-rtl " "Info: Found design unit 4: sld_jtag_state_machine-rtl" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "sld_jtag_state_machine-rtl" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 1012 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_hub " "Info: Found entity 1: sld_hub" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "sld_hub" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 99 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_jtag_state_machine " "Info: Found entity 2: sld_jtag_state_machine" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "sld_jtag_state_machine" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 997 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/quartus41/libraries/megafunctions/lpm_decode.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/altera/quartus41/libraries/megafunctions/lpm_decode.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_decode " "Info: Found entity 1: lpm_decode" {  } { { "e:/altera/quartus41/libraries/megafunctions/lpm_decode.tdf" "lpm_decode" "" { Text "e:/altera/quartus41/libraries/megafunctions/lpm_decode.tdf" 67 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_9ie.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/decode_9ie.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_9ie " "Info: Found entity 1: decode_9ie" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/db/decode_9ie.tdf" "decode_9ie" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/db/decode_9ie.tdf" 28 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file e:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_dffex-DFFEX " "Info: Found design unit 1: sld_dffex-DFFEX" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "sld_dffex-DFFEX" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 11 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_dffex " "Info: Found entity 1: sld_dffex" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "sld_dffex" "" { Text "e:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 4 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[0\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[0\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[1\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[1\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[2\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[2\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[3\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[3\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[4\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[4\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[5\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[5\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[6\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[6\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[7\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[7\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[8\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[8\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[9\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[9\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[10\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[10\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[11\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[11\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[12\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[12\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[13\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[13\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[14\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[14\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[15\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[15\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[16\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[16\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[17\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[17\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "REG32B:u2\|DOUT\[18\] REG32B:u2\|DOUT\[19\] " "Info: Duplicate register REG32B:u2\|DOUT\[18\] merged to single register REG32B:u2\|DOUT\[19\]" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG32B:u2\|DOUT\[19\] data_in GND " "Warning: Reduced register REG32B:u2\|DOUT\[19\] with stuck data_in port to stuck value GND" {  } { { "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" "" "" { Text "H:/ZX1C3_1C6demo/EDA_SOPC1C6_12/Chpt12_Multi/EXPT12_10_PHAS/reg32b.vhd" 6 -1 0 } }  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Info: Inferred 2 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_m9t:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~60 10 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=10) from the following logic: sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_m9t:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~60" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "" "ram_rom_addr_reg\[0\]~60" { Text "e:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 394 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_m9t:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_m9t:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "" "ram_rom_data_shift_cntr_reg\[0\]~8" { Text "e:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 537 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "2 " "Info: Inferred 2 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "sin_rom:u6\|altsyncram:altsyncram_component\|altsyncram_m9t:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~60 10 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=10) from the following logic: sin_rom:u6\|altsyncram:altsyncram_component\|altsyncram_m9t:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_addr_reg\[0\]~60" {  } { { "e:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" "" "ram_rom_addr_reg\[0\]~60" { Text "e:/altera/quartus41/libraries/megafunctions/sld_mod_ram_rom.vhd" 394 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "sin_rom:u6\|altsyncram:altsyncram_component\|altsyncram_m9t:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: sin_rom:u6\|altsyncram:altsyncram_component\|altsyncram_m9t:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ram_rom_data_shift_cntr_reg\[0\]~8" {
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