dds_vhdl.map.summary

来自「数字移相信号发生器设计」· SUMMARY 代码 · 共 12 行

Flow Status : Successful - Wed Dec 14 16:06:54 2005
Quartus II Version : 4.1 Build 181 06/29/2004 SJ Full Version
Revision Name : dds_vhdl
Top-level Entity Name : DDS_VHDL
Family : Cyclone
Device : EP1C6Q240C8
Timing Models : Production
Total logic elements : 815
Total pins : 42
Total memory bits : 39,424
Total PLLs : 0