cpld4gdf00.fit.eqn

用maxplus2实现的一种通用逻辑模块

K[7] = INPUT();


--K[6] is K[6] at PIN_64
--operation mode is input

K[6] = INPUT();


--K[5] is K[5] at PIN_63
--operation mode is input

K[5] = INPUT();


--K[4] is K[4] at PIN_62
--operation mode is input

K[4] = INPUT();


--K[3] is K[3] at PIN_59
--operation mode is input

K[3] = INPUT();


--K[2] is K[2] at PIN_58
--operation mode is input

K[2] = INPUT();


--K[1] is K[1] at PIN_57
--operation mode is input

K[1] = INPUT();


--K[0] is K[0] at PIN_56
--operation mode is input

K[0] = INPUT();


--SD3 is SD3 at PIN_70
--operation mode is output

SD3 = OUTPUT(~GND~0);


--SD2 is SD2 at PIN_69
--operation mode is output

SD2 = OUTPUT(~GND~1);


--SD1 is SD1 at PIN_68
--operation mode is output

SD1 = OUTPUT(~GND~2);


--SD0 is SD0 at PIN_67
--operation mode is output

SD0 = OUTPUT(~GND~3);


--/RAMWE is /RAMWE at PIN_109
--operation mode is output

/RAMWE = OUTPUT(~VCC~0);


--/RAMOE is /RAMOE at PIN_108
--operation mode is output

/RAMOE = OUTPUT(~VCC~1);


--/UOE is /UOE at PIN_53
--operation mode is output

/UOE = OUTPUT(~VCC~2);


--/UWE is /UWE at PIN_54
--operation mode is output

/UWE = OUTPUT(~VCC~3);


--INTSW is INTSW at PIN_107
--operation mode is output

INTSW = OUTPUT(~GND~4);


--A1L89 is RD~0 at PIN_132
--operation mode is bidir

A1L89 = RD[7];

--RD[7] is RD[7] at PIN_132
--operation mode is bidir

RD[7]_tri_out = TRI(A1L87, !H1L8);
RD[7] = BIDIR(RD[7]_tri_out);


--A1L99 is RD~1 at PIN_131
--operation mode is bidir

A1L99 = RD[6];

--RD[6] is RD[6] at PIN_131
--operation mode is bidir

RD[6]_tri_out = TRI(A1L67, !H1L8);
RD[6] = BIDIR(RD[6]_tri_out);


--A1L001 is RD~2 at PIN_130
--operation mode is bidir

A1L001 = RD[5];

--RD[5] is RD[5] at PIN_130
--operation mode is bidir

RD[5]_tri_out = TRI(A1L47, !H1L8);
RD[5] = BIDIR(RD[5]_tri_out);


--A1L101 is RD~3 at PIN_129
--operation mode is bidir

A1L101 = RD[4];

--RD[4] is RD[4] at PIN_129
--operation mode is bidir

RD[4]_tri_out = TRI(A1L27, !H1L8);
RD[4] = BIDIR(RD[4]_tri_out);


--A1L201 is RD~4 at PIN_128
--operation mode is bidir

A1L201 = RD[3];

--RD[3] is RD[3] at PIN_128
--operation mode is bidir

RD[3]_tri_out = TRI(A1L07, !H1L8);
RD[3] = BIDIR(RD[3]_tri_out);


--A1L301 is RD~5 at PIN_123
--operation mode is bidir

A1L301 = RD[2];

--RD[2] is RD[2] at PIN_123
--operation mode is bidir

RD[2]_tri_out = TRI(A1L86, !H1L8);
RD[2] = BIDIR(RD[2]_tri_out);


--A1L401 is RD~6 at PIN_122
--operation mode is bidir

A1L401 = RD[1];

--RD[1] is RD[1] at PIN_122
--operation mode is bidir

RD[1]_tri_out = TRI(A1L66, !H1L8);
RD[1] = BIDIR(RD[1]_tri_out);


--A1L501 is RD~7 at PIN_121
--operation mode is bidir

A1L501 = RD[0];

--RD[0] is RD[0] at PIN_121
--operation mode is bidir

RD[0]_tri_out = TRI(A1L46, !H1L8);
RD[0] = BIDIR(RD[0]_tri_out);


--/RS is /RS at PIN_111
--operation mode is output

/RS = OUTPUT(H1L4);


--D0 is D0 at PIN_149
--operation mode is bidir

D0_tri_out = TRI(~VCC~4, VCC);
D0 = BIDIR(D0_tri_out);


--D1 is D1 at PIN_150
--operation mode is bidir

D1_tri_out = TRI(~VCC~5, VCC);
D1 = BIDIR(D1_tri_out);


--D2 is D2 at PIN_151
--operation mode is bidir

D2_tri_out = TRI(~VCC~6, VCC);
D2 = BIDIR(D2_tri_out);


--D3 is D3 at PIN_152
--operation mode is bidir

D3_tri_out = TRI(~VCC~7, VCC);
D3 = BIDIR(D3_tri_out);


--/UCS is /UCS at PIN_110
--operation mode is output

/UCS = OUTPUT(H1L5);


--/XFER is /XFER at PIN_80
--operation mode is output

/XFER = OUTPUT(H1L7);


--A1L54 is D4~0 at PIN_153
--operation mode is bidir

A1L54 = D4;

--D4 is D4 at PIN_153
--operation mode is bidir

D4_tri_out = TRI(A1L111, GND);
D4 = BIDIR(D4_tri_out);


--A1L94 is D5~0 at PIN_158
--operation mode is bidir

A1L94 = D5;

--D5 is D5 at PIN_158
--operation mode is bidir

D5_tri_out = TRI(A1L311, GND);
D5 = BIDIR(D5_tri_out);


--A1L35 is D6~0 at PIN_159
--operation mode is bidir

A1L35 = D6;

--D6 is D6 at PIN_159
--operation mode is bidir

D6_tri_out = TRI(A1L511, GND);
D6 = BIDIR(D6_tri_out);


--A1L75 is D7~0 at PIN_160
--operation mode is bidir

A1L75 = D7;

--D7 is D7 at PIN_160
--operation mode is bidir

D7_tri_out = TRI(A1L711, GND);
D7 = BIDIR(D7_tri_out);


--/DACS is /DACS at PIN_43
--operation mode is output

/DACS = OUTPUT(H1L1);


--UD7 is UD7 at PIN_147
--operation mode is bidir

UD7_tri_out = TRI(~VCC~8, H1L6);
UD7 = BIDIR(UD7_tri_out);


--UD6 is UD6 at PIN_146
--operation mode is bidir

UD6_tri_out = TRI(~VCC~9, H1L6);
UD6 = BIDIR(UD6_tri_out);


--UD5 is UD5 at PIN_145
--operation mode is bidir

UD5_tri_out = TRI(~VCC~10, H1L6);
UD5 = BIDIR(UD5_tri_out);


--UD4 is UD4 at PIN_144
--operation mode is bidir

UD4_tri_out = TRI(~VCC~11, H1L6);
UD4 = BIDIR(UD4_tri_out);


--/BUFFER is /BUFFER at PIN_52
--operation mode is output

/BUFFER = OUTPUT(G1L1);


--/LRD is /LRD at PIN_33
--operation mode is output

/LRD = OUTPUT(E1_34);


--/LWR is /LWR at PIN_41
--operation mode is output

/LWR = OUTPUT(E1_35);


--/LCE is /LCE at PIN_32
--operation mode is output

/LCE = OUTPUT(E1_33);


--LC/D is LC/D at PIN_31
--operation mode is output

LC/D = OUTPUT(E1_32);


--UD3 is UD3 at PIN_137
--operation mode is bidir

UD3_tri_out = TRI(A1L64, H1L6);
UD3 = BIDIR(UD3_tri_out);


--UD2 is UD2 at PIN_136
--operation mode is bidir

UD2_tri_out = TRI(A1L05, H1L6);
UD2 = BIDIR(UD2_tri_out);


--UD1 is UD1 at PIN_135
--operation mode is bidir

UD1_tri_out = TRI(A1L45, H1L6);
UD1 = BIDIR(UD1_tri_out);


--UD0 is UD0 at PIN_134
--operation mode is bidir

UD0_tri_out = TRI(A1L85, H1L6);
UD0 = BIDIR(UD0_tri_out);


--BD5 is BD5 at PIN_103
--operation mode is bidir

BD5_tri_out = TRI(A1L15, !H1L2);
BD5 = BIDIR(BD5_tri_out);


--BD6 is BD6 at PIN_105
--operation mode is bidir

BD6_tri_out = TRI(A1L55, !H1L2);
BD6 = BIDIR(BD6_tri_out);


--BD7 is BD7 at PIN_106
--operation mode is bidir

BD7_tri_out = TRI(A1L95, !H1L2);
BD7 = BIDIR(BD7_tri_out);


--BD4 is BD4 at PIN_102
--operation mode is bidir

BD4_tri_out = TRI(A1L74, !H1L2);
BD4 = BIDIR(BD4_tri_out);


--BD1 is BD1 at PIN_98
--operation mode is bidir

BD1_tri_out = TRI(~VCC~12, !H1L2);
BD1 = BIDIR(BD1_tri_out);


--BD2 is BD2 at PIN_100
--operation mode is bidir

BD2_tri_out = TRI(~VCC~13, !H1L2);
BD2 = BIDIR(BD2_tri_out);


--BD3 is BD3 at PIN_101
--operation mode is bidir

BD3_tri_out = TRI(~VCC~14, !H1L2);
BD3 = BIDIR(BD3_tri_out);


--BD0 is BD0 at PIN_97
--operation mode is bidir

BD0_tri_out = TRI(~VCC~15, !H1L2);
BD0 = BIDIR(BD0_tri_out);


--L[8] is L[8] at PIN_96
--operation mode is output

L[8] = OUTPUT(C1_12);


--L[7] is L[7] at PIN_94
--operation mode is output

L[7] = OUTPUT(C1_13);


--L[6] is L[6] at PIN_93
--operation mode is output

L[6] = OUTPUT(C1_14);


--L[5] is L[5] at PIN_92
--operation mode is output

L[5] = OUTPUT(C1_15);


--L[4] is L[4] at PIN_91
--operation mode is output

L[4] = OUTPUT(C1_16);


--L[3] is L[3] at PIN_90
--operation mode is output

L[3] = OUTPUT(C1_17);


--L[2] is L[2] at PIN_89
--operation mode is output

L[2] = OUTPUT(C1_18);


--L[1] is L[1] at PIN_88
--operation mode is output

L[1] = OUTPUT(C1_19);






--H1L8 is u11:109|u1:94|XFER~40 at LC53
H1L8_or_out = H1L7;
H1L8 = H1L8_or_out;


--H1L6 is u11:109|u1:94|UCS~9 at LC59
H1L6_or_out = H1L5;
H1L6 = H1L6_or_out;