vz_ver4.prj

该工程文件实现ARM系统中CPLD的逻辑工作

  macro 'D:\CPLD_P~1\VZ_VER4\CLK_DIV.mod' updated on 102/11/29 16:48
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 16:49 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 16:49 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 16:50 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 16:51 
Schematic entry: 2002/10/29 16:57 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 17:6 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 17:7 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 17:8 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 17:13 
'D:\CPLD_P~1\VZ_VER4\de.abl' saved on 02/11/29 17:25
'D:\CPLD_P~1\VZ_VER4\de.abl' saved on 02/11/29 17:25
'D:\CPLD_project\vz_ver4\de.abl' saved on 02/11/29 17:26
Schematic entry: 2002/10/29 17:27 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 17:28 
'D:\CPLD_P~1\VZ_VER4\de.abl' saved on 02/11/29 17:29
'D:\CPLD_project\vz_ver4\de.abl' saved on 02/11/29 17:30
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 17:30 
Schematic entry: 2002/10/29 17:31 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/10/29 17:31 
Schematic entry: 2002/11/9 16:37 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/11/9 16:53 
  sheet 'D:\CPLD_P~1\VZ_VER4\VZ_VER41.SCH' saved: 102/11/9 16:54 
Schematic entry: 2003/2/1 11:33 
Schematic entry: 2003/2/26 17:21 
Schematic entry: 2003/3/20 15:55 
Schematic entry: 2003/3/20 16:13 
Schematic entry: 2003/3/23 11:38 
Schematic entry: 2003/4/29 9:30 
Schematic entry: 104/0/6 8:41 
Schematic entry: 104/0/7 17:57