myfifo.asm.qmsg

VERILOG HDL 实际工控项目源码

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.1 Build 208 09/10/2004 Service Pack 2 SJ Full Version " "Info: Version 4.1 Build 208 09/10/2004 Service Pack 2 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct 14 17:17:26 2004 " "Info: Processing started: Thu Oct 14 17:17:26 2004" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --import_settings_files=off --export_settings_files=off myfifo -c myfifo " "Info: Command: quartus_asm --import_settings_files=off --export_settings_files=off myfifo -c myfifo" {  } {  } 0}
{ "Warning" "WPGMIO_ILLEGAL_FILE_TYPE_REQUESTED" "EPC1441 jam " "Warning: Device EPC1441 does not support jam file type" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1  " "Info: Quartus II Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct 14 17:17:28 2004 " "Info: Processing ended: Thu Oct 14 17:17:28 2004" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}