myfifo.tan.qmsg

来自「VERILOG HDL 实际工控项目源码」· QMSG 代码 · 共 27 行 · 第 1/5 页

{ "Info" "ITAN_SCC_LOOP" "3 " "Info: Found combinational loop of 3 nodes" { { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[12\]~2437 " "Info: Node mydram:inst2\|d_out\[12\]~2437" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[12\]~2423 " "Info: Node mydram:inst2\|d_out\[12\]~2423" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[12\]~2396 " "Info: Node mydram:inst2\|d_out\[12\]~2396" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "3 " "Info: Found combinational loop of 3 nodes" { { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[10\]~2439 " "Info: Node mydram:inst2\|d_out\[10\]~2439" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[10\]~2425 " "Info: Node mydram:inst2\|d_out\[10\]~2425" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[10\]~2400 " "Info: Node mydram:inst2\|d_out\[10\]~2400" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "3 " "Info: Found combinational loop of 3 nodes" { { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[13\]~2436 " "Info: Node mydram:inst2\|d_out\[13\]~2436" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[13\]~2422 " "Info: Node mydram:inst2\|d_out\[13\]~2422" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[13\]~2394 " "Info: Node mydram:inst2\|d_out\[13\]~2394" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "3 " "Info: Found combinational loop of 3 nodes" { { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[6\]~2443 " "Info: Node mydram:inst2\|d_out\[6\]~2443" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[6\]~2429 " "Info: Node mydram:inst2\|d_out\[6\]~2429" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[6\]~2408 " "Info: Node mydram:inst2\|d_out\[6\]~2408" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "3 " "Info: Found combinational loop of 3 nodes" { { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[9\]~2440 " "Info: Node mydram:inst2\|d_out\[9\]~2440" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[9\]~2426 " "Info: Node mydram:inst2\|d_out\[9\]~2426" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[9\]~2402 " "Info: Node mydram:inst2\|d_out\[9\]~2402" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}
{ "Info" "ITAN_SCC_LOOP" "3 " "Info: Found combinational loop of 3 nodes" { { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[7\]~2442 " "Info: Node mydram:inst2\|d_out\[7\]~2442" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[7\]~2428 " "Info: Node mydram:inst2\|d_out\[7\]~2428" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0} { "Info" "ITAN_SCC_NODE" "mydram:inst2\|d_out\[7\]~2406 " "Info: Node mydram:inst2\|d_out\[7\]~2406" {  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}  } { { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } } { "E:/FPGApro/mydram.v" "" "" { Text "E:/FPGApro/mydram.v" 77 -1 0 } }  } 0}