📄 myfifo_v.sdo
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// Copyright (C) 1991-2004 Altera Corporation
// Any megafunction design, and related netlist (encrypted or decrypted),
// support information, device programming or simulation file, and any other
// associated documentation or information provided by Altera or a partner
// under Altera's Megafunction Partnership Program may be used only
// to program PLD devices (but not masked PLD devices) from Altera. Any
// other use of such megafunction design, netlist, support information,
// device programming or simulation file, or any other related documentation
// or information is prohibited for any other purpose, including, but not
// limited to modification, reverse engineering, de-compiling, or use with
// any other silicon devices, unless such use is explicitly licensed under
// a separate agreement with Altera or a megafunction partner. Title to the
// intellectual property, including patents, copyrights, trademarks, trade
// secrets, or maskworks, embodied in any such megafunction design, netlist,
// support information, device programming or simulation file, or any other
// related documentation or information provided by Altera or a megafunction
// partner, remains with Altera, the megafunction partner, or their respective
// licensors. No other licenses, including any licenses needed under any third
// party's intellectual property, are provided herein.
//
// Device: Altera EPF10K20TC144-4 Package TQFP144
//
//
// This SDF file should be used for ModelSim (Verilog HDL output from Quartus II) only
//
(DELAYFILE
(SDFVERSION "2.1")
(DESIGN "myfifo")
(DATE "10/14/2004 17:17:37")
(VENDOR "Altera")
(PROGRAM "Quartus II")
(VERSION "Version 4.1 Build 208 09/10/2004 Service Pack 2 SJ Full Version")
(DIVIDER .)
(TIMESCALE 1 ps)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|int_reg_rtl_0\|wysi_counter\|counter_cell\[6\].lecomb)
(DELAY
(ABSOLUTE
(PORT datab (2300:2300:2300) (2300:2300:2300))
(PORT cin (0:0:0) (0:0:0))
(IOPATH datab regin (1700:1700:1700) (1700:1700:1700))
(IOPATH cin regin (700:700:700) (700:700:700))
(IOPATH qfbkin regin (1900:1900:1900) (1900:1900:1900))
(IOPATH datab cout (1200:1200:1200) (1200:1200:1200))
(IOPATH qfbkin cout (1200:1200:1200) (1200:1200:1200))
)
)
)
(CELL
(CELLTYPE "flex10ke_lcell_register")
(INSTANCE inst1\|int_reg_rtl_0\|wysi_counter\|counter_cell\[6\].lereg)
(DELAY
(ABSOLUTE
(PORT datab (4000:4000:4000) (4000:4000:4000))
(PORT aclr (6100:6100:6100) (6100:6100:6100))
(PORT clk (2500:2500:2500) (2500:2500:2500))
(IOPATH (posedge clk) regout (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) regout (1200:1200:1200) (1200:1200:1200))
(IOPATH (posedge clk) qfbko (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) qfbko (1200:1200:1200) (1200:1200:1200))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (2500:2500:2500))
(SETUP datab (posedge clk) (2500:2500:2500))
(HOLD datain (posedge clk) (1600:1600:1600))
(HOLD datab (posedge clk) (1600:1600:1600))
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst2\|reduce_nor\~94_I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (600:600:600) (600:600:600))
(PORT datab (600:600:600) (600:600:600))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (600:600:600) (600:600:600))
(IOPATH dataa combout (2300:2300:2300) (2300:2300:2300))
(IOPATH datab combout (2300:2300:2300) (2300:2300:2300))
(IOPATH datac combout (2300:2300:2300) (2300:2300:2300))
(IOPATH datad combout (1800:1800:1800) (1800:1800:1800))
)
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst2\|reduce_nor\~96_I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (600:600:600) (600:600:600))
(PORT datab (3400:3400:3400) (3400:3400:3400))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (3200:3200:3200) (3200:3200:3200))
(IOPATH dataa combout (2300:2300:2300) (2300:2300:2300))
(IOPATH datab combout (2300:2300:2300) (2300:2300:2300))
(IOPATH datac combout (2300:2300:2300) (2300:2300:2300))
(IOPATH datad combout (1800:1800:1800) (1800:1800:1800))
)
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|delay\[7\]\~I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2200:2200:2200) (2200:2200:2200))
(PORT datab (2500:2500:2500) (2500:2500:2500))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (600:600:600) (600:600:600))
(IOPATH dataa regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datab regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datac regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datad regin (1200:1200:1200) (1200:1200:1200))
)
)
)
(CELL
(CELLTYPE "flex10ke_lcell_register")
(INSTANCE inst1\|delay\[7\]\~I.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (6100:6100:6100) (6100:6100:6100))
(PORT clk (2500:2500:2500) (2500:2500:2500))
(IOPATH (posedge clk) regout (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) regout (1200:1200:1200) (1200:1200:1200))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (2500:2500:2500))
(HOLD datain (posedge clk) (1600:1600:1600))
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|delay\[11\]\~I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2200:2200:2200) (2200:2200:2200))
(PORT datab (2500:2500:2500) (2500:2500:2500))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (2400:2400:2400) (2400:2400:2400))
(IOPATH dataa regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datab regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datac regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datad regin (1200:1200:1200) (1200:1200:1200))
)
)
)
(CELL
(CELLTYPE "flex10ke_lcell_register")
(INSTANCE inst1\|delay\[11\]\~I.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (6100:6100:6100) (6100:6100:6100))
(PORT clk (2500:2500:2500) (2500:2500:2500))
(IOPATH (posedge clk) regout (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) regout (1200:1200:1200) (1200:1200:1200))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (2500:2500:2500))
(HOLD datain (posedge clk) (1600:1600:1600))
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|delay\[10\]\~I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2200:2200:2200) (2200:2200:2200))
(PORT datab (2500:2500:2500) (2500:2500:2500))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (2400:2400:2400) (2400:2400:2400))
(IOPATH dataa regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datab regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datac regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datad regin (1200:1200:1200) (1200:1200:1200))
)
)
)
(CELL
(CELLTYPE "flex10ke_lcell_register")
(INSTANCE inst1\|delay\[10\]\~I.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (6100:6100:6100) (6100:6100:6100))
(PORT clk (2500:2500:2500) (2500:2500:2500))
(IOPATH (posedge clk) regout (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) regout (1200:1200:1200) (1200:1200:1200))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (2500:2500:2500))
(HOLD datain (posedge clk) (1600:1600:1600))
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|delay\[9\]\~I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2200:2200:2200) (2200:2200:2200))
(PORT datab (2500:2500:2500) (2500:2500:2500))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (2400:2400:2400) (2400:2400:2400))
(IOPATH dataa regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datab regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datac regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datad regin (1200:1200:1200) (1200:1200:1200))
)
)
)
(CELL
(CELLTYPE "flex10ke_lcell_register")
(INSTANCE inst1\|delay\[9\]\~I.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (6100:6100:6100) (6100:6100:6100))
(PORT clk (2500:2500:2500) (2500:2500:2500))
(IOPATH (posedge clk) regout (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) regout (1200:1200:1200) (1200:1200:1200))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (2500:2500:2500))
(HOLD datain (posedge clk) (1600:1600:1600))
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|delay\[8\]\~I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2200:2200:2200) (2200:2200:2200))
(PORT datab (2500:2500:2500) (2500:2500:2500))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (600:600:600) (600:600:600))
(IOPATH dataa regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datab regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datac regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datad regin (1200:1200:1200) (1200:1200:1200))
)
)
)
(CELL
(CELLTYPE "flex10ke_lcell_register")
(INSTANCE inst1\|delay\[8\]\~I.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (6100:6100:6100) (6100:6100:6100))
(PORT clk (2500:2500:2500) (2500:2500:2500))
(IOPATH (posedge clk) regout (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) regout (1200:1200:1200) (1200:1200:1200))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (2500:2500:2500))
(HOLD datain (posedge clk) (1600:1600:1600))
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|LessThan\~373_I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2300:2300:2300) (2300:2300:2300))
(PORT datab (600:600:600) (600:600:600))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (600:600:600) (600:600:600))
(IOPATH dataa combout (2300:2300:2300) (2300:2300:2300))
(IOPATH datab combout (2300:2300:2300) (2300:2300:2300))
(IOPATH datac combout (2300:2300:2300) (2300:2300:2300))
(IOPATH datad combout (1800:1800:1800) (1800:1800:1800))
)
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|delay\[5\]\~I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2200:2200:2200) (2200:2200:2200))
(PORT datab (2500:2500:2500) (2500:2500:2500))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (2400:2400:2400) (2400:2400:2400))
(IOPATH dataa regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datab regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datac regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datad regin (1200:1200:1200) (1200:1200:1200))
)
)
)
(CELL
(CELLTYPE "flex10ke_lcell_register")
(INSTANCE inst1\|delay\[5\]\~I.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (6100:6100:6100) (6100:6100:6100))
(PORT clk (2500:2500:2500) (2500:2500:2500))
(IOPATH (posedge clk) regout (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) regout (1200:1200:1200) (1200:1200:1200))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (2500:2500:2500))
(HOLD datain (posedge clk) (1600:1600:1600))
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|delay\[6\]\~I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2200:2200:2200) (2200:2200:2200))
(PORT datab (600:600:600) (600:600:600))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (2400:2400:2400) (2400:2400:2400))
(IOPATH dataa regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datab regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datac regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datad regin (1200:1200:1200) (1200:1200:1200))
)
)
)
(CELL
(CELLTYPE "flex10ke_lcell_register")
(INSTANCE inst1\|delay\[6\]\~I.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (6100:6100:6100) (6100:6100:6100))
(PORT clk (2500:2500:2500) (2500:2500:2500))
(IOPATH (posedge clk) regout (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) regout (1200:1200:1200) (1200:1200:1200))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (2500:2500:2500))
(HOLD datain (posedge clk) (1600:1600:1600))
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|delay\[4\]\~I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2200:2200:2200) (2200:2200:2200))
(PORT datab (600:600:600) (600:600:600))
(PORT datac (600:600:600) (600:600:600))
(PORT datad (2400:2400:2400) (2400:2400:2400))
(IOPATH dataa regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datab regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datac regin (1700:1700:1700) (1700:1700:1700))
(IOPATH datad regin (1200:1200:1200) (1200:1200:1200))
)
)
)
(CELL
(CELLTYPE "flex10ke_lcell_register")
(INSTANCE inst1\|delay\[4\]\~I.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (6100:6100:6100) (6100:6100:6100))
(PORT clk (2500:2500:2500) (2500:2500:2500))
(IOPATH (posedge clk) regout (1100:1100:1100) (1100:1100:1100))
(IOPATH (posedge aclr) regout (1200:1200:1200) (1200:1200:1200))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (2500:2500:2500))
(HOLD datain (posedge clk) (1600:1600:1600))
)
)
(CELL
(CELLTYPE "flex10ke_asynch_lcell")
(INSTANCE inst1\|delay\[3\]\~I.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (2200:2200:2200) (2200:2200:2200))
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