677.ptf

基于FPGA的乐曲硬件演奏电路设计的实现

SYSTEM 677
{
   WIZARD_SCRIPT_ARGUMENTS 
   {
      device_family = "CYCLONE";
      clock_freq = "50000000";
      generate_hdl = "1";
      generate_sdk = "1";
      do_build_sim = "1";
      board_class = "";
      hdl_language = "vhdl";
      view_master_columns = "0";
      view_master_priorities = "0";
      device_family_id = "CYCLONE";
      name_column_width = "209";
      desc_column_width = "209";
      bustype_column_width = "0";
      base_column_width = "75";
      end_column_width = "75";
   }
}