test.map.qmsg

用fpga实现isp接口的源码

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_mux SPI:inst\|MUX7:inst16\|lpm_mux:lpm_mux_component " "Info: Elaborating entity \"lpm_mux\" for hierarchy \"SPI:inst\|MUX7:inst16\|lpm_mux:lpm_mux_component\"" {  } { { "MUX7.v" "lpm_mux_component" { Text "F:/SPI/SPI_Byte_1/MUX7.v" 65 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "SPI:inst\|MUX7:inst16\|lpm_mux:lpm_mux_component " "Info: Elaborated megafunction instantiation \"SPI:inst\|MUX7:inst16\|lpm_mux:lpm_mux_component\"" {  } { { "MUX7.v" "" { Text "F:/SPI/SPI_Byte_1/MUX7.v" 65 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_afc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_afc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_afc " "Info: Found entity 1: mux_afc" {  } { { "db/mux_afc.tdf" "" { Text "F:/SPI/SPI_Byte_1/db/mux_afc.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mux_afc SPI:inst\|MUX7:inst16\|lpm_mux:lpm_mux_component\|mux_afc:auto_generated " "Info: Elaborating entity \"mux_afc\" for hierarchy \"SPI:inst\|MUX7:inst16\|lpm_mux:lpm_mux_component\|mux_afc:auto_generated\"" {  } { { "lpm_mux.tdf" "auto_generated" { Text "e:/altera/quartus60/libraries/megafunctions/lpm_mux.tdf" 84 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "RAM_RD SPI:inst\|RAM_RD:inst11 " "Info: Elaborating entity \"RAM_RD\" for hierarchy \"SPI:inst\|RAM_RD:inst11\"" {  } { { "SPI.bdf" "inst11" { Schematic "F:/SPI/SPI_Byte_1/SPI.bdf" { { 512 368 512 608 "inst11" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "RAM7.v 1 1 " "Warning: Using design file RAM7.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 RAM7 " "Info: Found entity 1: RAM7" {  } { { "RAM7.v" "" { Text "F:/SPI/SPI_Byte_1/RAM7.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "RAM7 SPI:inst\|RAM7:inst10 " "Info: Elaborating entity \"RAM7\" for hierarchy \"SPI:inst\|RAM7:inst10\"" {  } { { "SPI.bdf" "inst10" { Schematic "F:/SPI/SPI_Byte_1/SPI.bdf" { { 328 312 568 504 "inst10" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/quartus60/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/altera/quartus60/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/altsyncram.tdf" 426 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram SPI:inst\|RAM7:inst10\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"SPI:inst\|RAM7:inst10\|altsyncram:altsyncram_component\"" {  } { { "RAM7.v" "altsyncram_component" { Text "F:/SPI/SPI_Byte_1/RAM7.v" 77 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "SPI:inst\|RAM7:inst10\|altsyncram:altsyncram_component " "Info: Elaborated megafunction instantiation \"SPI:inst\|RAM7:inst10\|altsyncram:altsyncram_component\"" {  } { { "RAM7.v" "" { Text "F:/SPI/SPI_Byte_1/RAM7.v" 77 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_jam1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_jam1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_jam1 " "Info: Found entity 1: altsyncram_jam1" {  } { { "db/altsyncram_jam1.tdf" "" { Text "F:/SPI/SPI_Byte_1/db/altsyncram_jam1.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_jam1 SPI:inst\|RAM7:inst10\|altsyncram:altsyncram_component\|altsyncram_jam1:auto_generated " "Info: Elaborating entity \"altsyncram_jam1\" for hierarchy \"SPI:inst\|RAM7:inst10\|altsyncram:altsyncram_component\|altsyncram_jam1:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "e:/altera/quartus60/libraries/megafunctions/altsyncram.tdf" 905 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "INTERFACE INTERFACE:inst1 " "Info: Elaborating entity \"INTERFACE\" for hierarchy \"INTERFACE:inst1\"" {  } { { "TEST.bdf" "inst1" { Schematic "F:/SPI/SPI_Byte_1/TEST.bdf" { { 192 560 808 320 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "tritest8.v 1 1 " "Warning: Using design file tritest8.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 tritest8 " "Info: Found entity 1: tritest8" {  } { { "tritest8.v" "" { Text "F:/SPI/SPI_Byte_1/tritest8.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "tritest8 INTERFACE:inst1\|tritest8:inst " "Info: Elaborating entity \"tritest8\" for hierarchy \"INTERFACE:inst1\|tritest8:inst\"" {  } { { "INTERFACE.bdf" "inst" { Schematic "F:/SPI/SPI_Byte_1/INTERFACE.bdf" { { 208 744 840 264 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/quartus60/libraries/megafunctions/lpm_bustri.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/altera/quartus60/libraries/megafunctions/lpm_bustri.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_bustri " "Info: Found entity 1: lpm_bustri" {  } { { "lpm_bustri.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/lpm_bustri.tdf" 29 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_bustri INTERFACE:inst1\|tritest8:inst\|lpm_bustri:lpm_bustri_component " "Info: Elaborating entity \"lpm_bustri\" for hierarchy \"INTERFACE:inst1\|tritest8:inst\|lpm_bustri:lpm_bustri_component\"" {  } { { "tritest8.v" "lpm_bustri_component" { Text "F:/SPI/SPI_Byte_1/tritest8.v" 57 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "INTERFACE:inst1\|tritest8:inst\|lpm_bustri:lpm_bustri_component " "Info: Elaborated megafunction instantiation \"INTERFACE:inst1\|tritest8:inst\|lpm_bustri:lpm_bustri_component\"" {  } { { "tritest8.v" "" { Text "F:/SPI/SPI_Byte_1/tritest8.v" 57 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "BUS_S.v 1 1 " "Warning: Using design file BUS_S.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 BUS_S " "Info: Found entity 1: BUS_S" {  } { { "BUS_S.v" "" { Text "F:/SPI/SPI_Byte_1/BUS_S.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "BUS_S BUS_S:inst2 " "Info: Elaborating entity \"BUS_S\" for hierarchy \"BUS_S:inst2\"" {  } { { "TEST.bdf" "inst2" { Schematic "F:/SPI/SPI_Byte_1/TEST.bdf" { { 624 1232 1312 664 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_bustri BUS_S:inst2\|lpm_bustri:lpm_bustri_component " "Info: Elaborating entity \"lpm_bustri\" for hierarchy \"BUS_S:inst2\|lpm_bustri:lpm_bustri_component\"" {  } { { "BUS_S.v" "lpm_bustri_component" { Text "F:/SPI/SPI_Byte_1/BUS_S.v" 55 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "BUS_S:inst2\|lpm_bustri:lpm_bustri_component " "Info: Elaborated megafunction instantiation \"BUS_S:inst2\|lpm_bustri:lpm_bustri_component\"" {  } { { "BUS_S.v" "" { Text "F:/SPI/SPI_Byte_1/BUS_S.v" 55 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}