test.map.qmsg

用fpga实现isp接口的源码

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "alt_le_rden_reg SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator " "Info: Elaborating entity \"alt_le_rden_reg\" for hierarchy \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\"" {  } { { "altdpram.tdf" "latch_emulator" { Text "e:/altera/quartus60/libraries/megafunctions/altdpram.tdf" 360 7 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Elaborated megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\", which is child of megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\"" {  } { { "altdpram.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/altdpram.tdf" 360 7 0 } } { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Instantiated megafunction \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr OFF " "Info: Parameter \"indata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg INCLOCK " "Info: Parameter \"indata_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone " "Info: Parameter \"intended_device_family\" = \"Cyclone\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altdpram " "Info: Parameter \"lpm_type\" = \"altdpram\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr OFF " "Info: Parameter \"outdata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg UNREGISTERED " "Info: Parameter \"outdata_reg\" = \"UNREGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_aclr OFF " "Info: Parameter \"rdaddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_reg OUTCLOCK " "Info: Parameter \"rdaddress_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_aclr OFF " "Info: Parameter \"rdcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_reg OUTCLOCK " "Info: Parameter \"rdcontrol_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "use_eab OFF " "Info: Parameter \"use_eab\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width 8 " "Info: Parameter \"width\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad 6 " "Info: Parameter \"widthad\" = \"6\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_aclr OFF " "Info: Parameter \"wraddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_reg INCLOCK " "Info: Parameter \"wraddress_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr OFF " "Info: Parameter \"wrcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_reg INCLOCK " "Info: Parameter \"wrcontrol_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/quartus60/libraries/megafunctions/a_hdffe.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/altera/quartus60/libraries/megafunctions/a_hdffe.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_hdffe " "Info: Found entity 1: a_hdffe" {  } { { "a_hdffe.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/a_hdffe.tdf" 11 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "a_hdffe SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|a_hdffe:rden_reg " "Info: Elaborating entity \"a_hdffe\" for hierarchy \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|a_hdffe:rden_reg\"" {  } { { "alt_le_rden_reg.tdf" "rden_reg" { Text "e:/altera/quartus60/libraries/megafunctions/alt_le_rden_reg.tdf" 60 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WTDFX_ASSERTION" "Current device family (Cyclone) does not support the power-up high feature in asynchronously clearable registers " "Warning: Assertion warning: Current device family (Cyclone) does not support the power-up high feature in asynchronously clearable registers" {  } { { "a_hdffe.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/a_hdffe.tdf" 42 3 0 } } { "alt_le_rden_reg.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/alt_le_rden_reg.tdf" 60 3 0 } } { "altdpram.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/altdpram.tdf" 360 7 0 } } { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } } { "SPI.bdf" "" { Schematic "F:/SPI/SPI_Byte_1/SPI.bdf" { { 24 312 568 200 "inst2" "" } } } } { "TEST.bdf" "" { Schematic "F:/SPI/SPI_Byte_1/TEST.bdf" { { 536 560 824 728 "inst" "" } } } }  } 0 0 "Assertion warning: %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|a_hdffe:rden_reg SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Elaborated megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|a_hdffe:rden_reg\", which is child of megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\"" {  } { { "alt_le_rden_reg.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/alt_le_rden_reg.tdf" 60 3 0 } } { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Instantiated megafunction \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr OFF " "Info: Parameter \"indata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg INCLOCK " "Info: Parameter \"indata_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone " "Info: Parameter \"intended_device_family\" = \"Cyclone\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altdpram " "Info: Parameter \"lpm_type\" = \"altdpram\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr OFF " "Info: Parameter \"outdata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg UNREGISTERED " "Info: Parameter \"outdata_reg\" = \"UNREGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_aclr OFF " "Info: Parameter \"rdaddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_reg OUTCLOCK " "Info: Parameter \"rdaddress_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_aclr OFF " "Info: Parameter \"rdcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_reg OUTCLOCK " "Info: Parameter \"rdcontrol_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "use_eab OFF " "Info: Parameter \"use_eab\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width 8 " "Info: Parameter \"width\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad 6 " "Info: Parameter \"widthad\" = \"6\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_aclr OFF " "Info: Parameter \"wraddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_reg INCLOCK " "Info: Parameter \"wraddress_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr OFF " "Info: Parameter \"wrcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_reg INCLOCK " "Info: Parameter \"wrcontrol_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_mux SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|lpm_mux:latch_mux " "Info: Elaborating entity \"lpm_mux\" for hierarchy \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|lpm_mux:latch_mux\"" {  } { { "alt_le_rden_reg.tdf" "latch_mux" { Text "e:/altera/quartus60/libraries/megafunctions/alt_le_rden_reg.tdf" 64 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|lpm_mux:latch_mux SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Elaborated megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|lpm_mux:latch_mux\", which is child of megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\"" {  } { { "alt_le_rden_reg.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/alt_le_rden_reg.tdf" 64 2 0 } } { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Instantiated megafunction \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr OFF " "Info: Parameter \"indata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg INCLOCK " "Info: Parameter \"indata_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone " "Info: Parameter \"intended_device_family\" = \"Cyclone\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altdpram " "Info: Parameter \"lpm_type\" = \"altdpram\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr OFF " "Info: Parameter \"outdata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg UNREGISTERED " "Info: Parameter \"outdata_reg\" = \"UNREGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_aclr OFF " "Info: Parameter \"rdaddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_reg OUTCLOCK " "Info: Parameter \"rdaddress_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_aclr OFF " "Info: Parameter \"rdcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_reg OUTCLOCK " "Info: Parameter \"rdcontrol_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "use_eab OFF " "Info: Parameter \"use_eab\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width 8 " "Info: Parameter \"width\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad 6 " "Info: Parameter \"widthad\" = \"6\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_aclr OFF " "Info: Parameter \"wraddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_reg INCLOCK " "Info: Parameter \"wraddress_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr OFF " "Info: Parameter \"wrcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_reg INCLOCK " "Info: Parameter \"wrcontrol_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_lrd.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_lrd.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_lrd " "Info: Found entity 1: mux_lrd" {  } { { "db/mux_lrd.tdf" "" { Text "F:/SPI/SPI_Byte_1/db/mux_lrd.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mux_lrd SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|lpm_mux:latch_mux\|mux_lrd:auto_generated " "Info: Elaborating entity \"mux_lrd\" for hierarchy \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|alt_le_rden_reg:latch_emulator\|lpm_mux:latch_mux\|mux_lrd:auto_generated\"" {  } { { "lpm_mux.tdf" "auto_generated" { Text "e:/altera/quartus60/libraries/megafunctions/lpm_mux.tdf" 84 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "a_hdffe SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|a_hdffe:xrer " "Info: Elaborating entity \"a_hdffe\" for hierarchy \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|a_hdffe:xrer\"" {  } { { "altdpram.tdf" "xrer" { Text "e:/altera/quartus60/libraries/megafunctions/altdpram.tdf" 415 7 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|a_hdffe:xrer SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Elaborated megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|a_hdffe:xrer\", which is child of megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\"" {  } { { "altdpram.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/altdpram.tdf" 415 7 0 } } { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Instantiated megafunction \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr OFF " "Info: Parameter \"indata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg INCLOCK " "Info: Parameter \"indata_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone " "Info: Parameter \"intended_device_family\" = \"Cyclone\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altdpram " "Info: Parameter \"lpm_type\" = \"altdpram\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr OFF " "Info: Parameter \"outdata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg UNREGISTERED " "Info: Parameter \"outdata_reg\" = \"UNREGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_aclr OFF " "Info: Parameter \"rdaddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_reg OUTCLOCK " "Info: Parameter \"rdaddress_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_aclr OFF " "Info: Parameter \"rdcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_reg OUTCLOCK " "Info: Parameter \"rdcontrol_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "use_eab OFF " "Info: Parameter \"use_eab\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width 8 " "Info: Parameter \"width\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad 6 " "Info: Parameter \"widthad\" = \"6\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_aclr OFF " "Info: Parameter \"wraddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_reg INCLOCK " "Info: Parameter \"wraddress_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr OFF " "Info: Parameter \"wrcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_reg INCLOCK " "Info: Parameter \"wrcontrol_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "a_hdffe SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|a_hdffe:xrer\|a_hdffe:ldffe " "Info: Elaborating entity \"a_hdffe\" for hierarchy \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|a_hdffe:xrer\|a_hdffe:ldffe\"" {  } { { "a_hdffe.tdf" "ldffe" { Text "e:/altera/quartus60/libraries/megafunctions/a_hdffe.tdf" 28 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|a_hdffe:xrer\|a_hdffe:ldffe SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Elaborated megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\|a_hdffe:xrer\|a_hdffe:ldffe\", which is child of megafunction instantiation \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\"" {  } { { "a_hdffe.tdf" "" { Text "e:/altera/quartus60/libraries/megafunctions/a_hdffe.tdf" 28 3 0 } } { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component " "Info: Instantiated megafunction \"SPI:inst\|RAM_TEST:inst2\|altdpram:altdpram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr OFF " "Info: Parameter \"indata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg INCLOCK " "Info: Parameter \"indata_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone " "Info: Parameter \"intended_device_family\" = \"Cyclone\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altdpram " "Info: Parameter \"lpm_type\" = \"altdpram\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr OFF " "Info: Parameter \"outdata_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg UNREGISTERED " "Info: Parameter \"outdata_reg\" = \"UNREGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_aclr OFF " "Info: Parameter \"rdaddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdaddress_reg OUTCLOCK " "Info: Parameter \"rdaddress_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_aclr OFF " "Info: Parameter \"rdcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_reg OUTCLOCK " "Info: Parameter \"rdcontrol_reg\" = \"OUTCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "use_eab OFF " "Info: Parameter \"use_eab\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width 8 " "Info: Parameter \"width\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad 6 " "Info: Parameter \"widthad\" = \"6\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_aclr OFF " "Info: Parameter \"wraddress_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wraddress_reg INCLOCK " "Info: Parameter \"wraddress_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr OFF " "Info: Parameter \"wrcontrol_aclr\" = \"OFF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_reg INCLOCK " "Info: Parameter \"wrcontrol_reg\" = \"INCLOCK\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "RAM_TEST.v" "" { Text "F:/SPI/SPI_Byte_1/RAM_TEST.v" 69 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "RAM_WR SPI:inst\|RAM_WR:inst " "Info: Elaborating entity \"RAM_WR\" for hierarchy \"SPI:inst\|RAM_WR:inst\"" {  } { { "SPI.bdf" "inst" { Schematic "F:/SPI/SPI_Byte_1/SPI.bdf" { { 208 368 512 304 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "MUX7.v 1 1 " "Warning: Using design file MUX7.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 MUX7 " "Info: Found entity 1: MUX7" {  } { { "MUX7.v" "" { Text "F:/SPI/SPI_Byte_1/MUX7.v" 36 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "MUX7 SPI:inst\|MUX7:inst16 " "Info: Elaborating entity \"MUX7\" for hierarchy \"SPI:inst\|MUX7:inst16\"" {  } { { "SPI.bdf" "inst16" { Schematic "F:/SPI/SPI_Byte_1/SPI.bdf" { { 376 680 816 456 "inst16" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}