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📄 test.sim.rpt

📁 用fpga实现isp接口的源码
💻 RPT
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; |TEST|SPI:inst|spiprocess:inst21|Equal9~41                                                                                                            ; |TEST|SPI:inst|spiprocess:inst21|Equal9~41                                                                                                            ; combout          ;
; |TEST|SPI:inst|spiprocess:inst21|SendRDen                                                                                                             ; |TEST|SPI:inst|spiprocess:inst21|SendRDen                                                                                                             ; regout           ;
; |TEST|SPI:inst|spiprocess:inst21|SendramCLK                                                                                                           ; |TEST|SPI:inst|spiprocess:inst21|SendramCLK                                                                                                           ; regout           ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[2]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[2]                                                                                                          ; regout           ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[2]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[2]~679                                                                                                      ; cout0            ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[2]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[2]~679COUT1                                                                                                 ; cout1            ;
; |TEST|SPI:inst|RAM_RD:inst11|ramsel~25                                                                                                                ; |TEST|SPI:inst|RAM_RD:inst11|ramsel~25                                                                                                                ; combout          ;
; |TEST|SPI:inst|RAM_WR:inst|ramsel                                                                                                                     ; |TEST|SPI:inst|RAM_WR:inst|ramsel                                                                                                                     ; combout          ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[0]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[0]                                                                                                          ; regout           ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[0]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[0]~680                                                                                                      ; cout0            ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[0]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[0]~680COUT1_691                                                                                             ; cout1            ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[1]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[1]                                                                                                          ; regout           ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[1]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[1]~681                                                                                                      ; cout0            ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[1]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[1]~681COUT1_692                                                                                             ; cout1            ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[3]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[3]                                                                                                          ; regout           ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[3]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[3]~682                                                                                                      ; cout             ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[4]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[4]                                                                                                          ; regout           ;
; |TEST|SPI:inst|spiprocess:inst21|SendAddr[4]                                                                                                          ; |TEST|SPI:inst|spiprocess:inst21|SendAddr[4]~683                                                                                                      ; cout0            ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode109w[3]                                ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode109w[3]                                ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode3w[3]                                  ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode3w[3]                                  ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode77w[3]                                 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode77w[3]                                 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode67w[3]                                 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode67w[3]                                 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode37w[3]                                 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode37w[3]                                 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode47w[3]                                 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode47w[3]                                 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode20w[3]                                 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode20w[3]                                 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode57w[3]                                 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode57w[3]                                 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode120w[3]                                ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_decode:wdecoder|decode_6lf:auto_generated|w_anode120w[3]                                ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2686w~47                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2686w~47                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2686w~48                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2686w~48                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2684w~44                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2684w~44                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2684w~45                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2684w~45                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5632 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5632 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2768w~281                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2768w~281                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2768w~282                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2768w~282                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5635 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5635 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5636 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5636 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2490w~49                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2490w~49                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2490w~50                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2490w~50                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2488w~44                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2488w~44                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2488w~45                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2488w~45                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5637 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5637 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2572w~407                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2572w~407                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2572w~408                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2572w~408                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5640 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5640 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5641 ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|alt_le_rden_reg:latch_emulator|lpm_mux:latch_mux|mux_lrd:auto_generated|result_node[4]~5641 ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2588w~47                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2588w~47                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2387w~47                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2387w~47                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2387w~48                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2387w~48                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2780w~566                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2780w~566                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2586w~44                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2586w~44                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2586w~45                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2586w~45                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2385w~44                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2385w~44                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2385w~45                                         ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2385w~45                                         ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2780w~567                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2780w~567                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2780w~568                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2780w~568                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2670w~281                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2670w~281                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2670w~282                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2670w~282                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2470w~281                                        ; |TEST|SPI:inst|RAM_TEST:inst2|altdpram:altdpram_component|lpm_mux:mux|mux_7hc:auto_generated|w_result2470w~281                                        ; combout          ;
; |TEST|SPI:inst|RAM_TEST:inst2|a

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