dcfq.drc.qmsg

经典触发器

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Design Assistant " "Info: Running Quartus II Design Assistant" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 190 1/28/2004 SJ Full Version " "Info: Version 4.0 Build 190 1/28/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Dec 21 16:40:18 2006 " "Info: Processing started: Thu Dec 21 16:40:18 2006" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_drc --import_settings_files=on --export_settings_files=off DCFQ -c DCFQ " "Info: Command: quartus_drc --import_settings_files=on --export_settings_files=off DCFQ -c DCFQ" {  } {  } 0}
{ "Info" "IDRC_DRC_UNSUPPORTED_HC_DEVICE" "EP1C3T100C6 " "Info: Design Assistant information: target device EP1C3T100C6 does not support HardCopy conversion -- ignored HardCopy rules" {  } {  } 2}
{ "Critical Warning" "WDRC_CLOCK_SPINES" "Clock signal should be a global signal 1 " "Critical Warning: Design Assistant warning: Clock signal should be a global signal. Found 1 node(s) related to this rule." { { "Critical Warning" "WDRC_NODES_CRITICAL_WARNING" "CLK " "Critical Warning: Node CLK" {  } { { "d:/quartus/dcfq项目/DCFQ.vhd" "" "" { Text "d:/quartus/dcfq项目/DCFQ.vhd" 6 -1 0 } }  } 1}  } {  } 1}
{ "Info" "IDRC_TOP_FANOUT" "Top nodes with highest fan-out 3 " "Info: Design Assistant information: Top nodes with highest fan-out. Found 3 node(s) with highest fan-out." { { "Info" "IDRC_TOP_FANOUT_NODE" "Q~reg0 1 " "Info: Node Q~reg0 has 1 fan-out(s)" {  } { { "d:/quartus/dcfq项目/DCFQ.vhd" "" "" { Text "d:/quartus/dcfq项目/DCFQ.vhd" 14 -1 0 } }  } 0} { "Info" "IDRC_TOP_FANOUT_NODE" "D 1 " "Info: Node D has 1 fan-out(s)" {  } { { "d:/quartus/dcfq项目/DCFQ.vhd" "" "" { Text "d:/quartus/dcfq项目/DCFQ.vhd" 7 -1 0 } }  } 0} { "Info" "IDRC_TOP_FANOUT_NODE" "CLK 1 " "Info: Node CLK has 1 fan-out(s)" {  } { { "d:/quartus/dcfq项目/DCFQ.vhd" "" "" { Text "d:/quartus/dcfq项目/DCFQ.vhd" 6 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IDRC_MISSING_FMAX_ASSG_SETTING" "Design is missing fmax requirement 1 " "Info: Design Assistant information: Design is missing fmax requirement. Found 1 instance(s) related to this rule." { { "Info" "IDRC_NODES_INFO" "CLK " "Info: Node CLK" {  } { { "d:/quartus/dcfq项目/DCFQ.vhd" "" "" { Text "d:/quartus/dcfq项目/DCFQ.vhd" 6 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IDRC_MISSING_TIMING_ASSG_SETTING" "Design is missing tco, tpd, or tsu requirement 5 " "Info: Design Assistant information: Design is missing tco, tpd, or tsu requirement. Found 5 instance(s) related to this rule." { { "Info" "IDRC_NODES_INFO" "D " "Info: Node D" {  } { { "d:/quartus/dcfq项目/DCFQ.vhd" "" "" { Text "d:/quartus/dcfq项目/DCFQ.vhd" 7 -1 0 } }  } 0} { "Info" "IDRC_NODES_INFO" "Q " "Info: Node Q" {  } { { "d:/quartus/dcfq项目/DCFQ.vhd" "" "" { Text "d:/quartus/dcfq项目/DCFQ.vhd" 8 -1 0 } }  } 0} { "Info" "IDRC_NODES_INFO" "~nCSO~ " "Info: Node ~nCSO~" {  } {  } 0} { "Info" "IDRC_NODES_INFO" "~ASDO~ " "Info: Node ~ASDO~" {  } {  } 0} { "Info" "IDRC_NODES_INFO" "CLK " "Info: Node CLK" {  } { { "d:/quartus/dcfq项目/DCFQ.vhd" "" "" { Text "d:/quartus/dcfq项目/DCFQ.vhd" 6 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IDRC_REPORT_HEALTH_POST_FITTER" "9 1 " "Info: Design Assistant information: finished post-fitting analysis of current design -- generated 9 information messages and 1 warning messages" {  } {  } 2}
{ "Info" "IQEXE_ERROR_COUNT" "Design Assistant 0 s 2 s " "Info: Quartus II Design Assistant was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Dec 21 16:40:18 2006 " "Info: Processing ended: Thu Dec 21 16:40:18 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0}  } {  } 0}