led6.map.eqn

通过VERILOG HDL语言使用CPLD连接PS2键盘

B1_dffs[26] = DFFE(B1_dffs[26]_reg_input, GLOBAL(clock), , , );


--B1_dffs[27] is lpm_counter:count_rtl_0|dffs[27]
B1_dffs[27]_p1_out = B1_dffs[26] & B1_dffs[25] & B1_dffs[24] & B1_dffs[23] & B1_dffs[22] & B1_dffs[21] & B1_dffs[20] & B1_dffs[19] & B1_dffs[18] & B1_dffs[17] & B1_dffs[16] & B1_dffs[15] & B1_dffs[14] & B1_dffs[13] & B1_dffs[12] & B1_dffs[11] & B1_dffs[10] & B1_dffs[9] & B1_dffs[8] & B1_dffs[7] & B1_dffs[6] & B1_dffs[5] & B1_dffs[4] & B1_dffs[3] & B1_dffs[2] & B1_dffs[1] & B1_dffs[0];
B1_dffs[27]_or_out = B1_dffs[27];
B1_dffs[27]_reg_input = B1_dffs[27]_p1_out $ B1_dffs[27]_or_out;
B1_dffs[27] = DFFE(B1_dffs[27]_reg_input, GLOBAL(clock), , , );


--A1L2 is reduce_or~1107
A1L2_p1_out = !B1_dffs[26] & !B1_dffs[27] & B1_dffs[24];
A1L2_p2_out = B1_dffs[26] & B1_dffs[27] & B1_dffs[24] & !B1_dffs[25];
A1L2_p3_out = !B1_dffs[26] & !B1_dffs[27] & B1_dffs[25];
A1L2_p4_out = !B1_dffs[27] & B1_dffs[24] & B1_dffs[25];
A1L2_or_out = A1L2_p1_out # A1L2_p2_out # A1L2_p3_out # A1L2_p4_out;
A1L2 = A1L2_or_out;


--A1L3 is reduce_or~1111
A1L3_p1_out = B1_dffs[24] & !B1_dffs[27] & B1_dffs[25] & B1_dffs[26];
A1L3_p2_out = !B1_dffs[27] & !B1_dffs[25] & !B1_dffs[26];
A1L3_p3_out = !B1_dffs[24] & B1_dffs[27] & !B1_dffs[25] & B1_dffs[26];
A1L3_or_out = A1L3_p1_out # A1L3_p2_out # A1L3_p3_out;
A1L3 = A1L3_or_out;


--A1L4 is reduce_or~1115
A1L4_p1_out = !B1_dffs[27] & !B1_dffs[25] & B1_dffs[26];
A1L4_p2_out = !B1_dffs[27] & B1_dffs[24];
A1L4_p3_out = !B1_dffs[25] & !B1_dffs[26] & B1_dffs[24];
A1L4_or_out = A1L4_p1_out # A1L4_p2_out # A1L4_p3_out;
A1L4 = A1L4_or_out;


--A1L5 is reduce_or~1120
A1L5_p1_out = B1_dffs[24] & !B1_dffs[25] & B1_dffs[26] & B1_dffs[27];
A1L5_p2_out = B1_dffs[24] & B1_dffs[25] & !B1_dffs[26] & B1_dffs[27];
A1L5_p3_out = B1_dffs[24] & !B1_dffs[25] & !B1_dffs[26] & !B1_dffs[27];
A1L5_p4_out = !B1_dffs[24] & !B1_dffs[25] & B1_dffs[26] & !B1_dffs[27];
A1L5_or_out = A1L5_p1_out # A1L5_p2_out # A1L5_p3_out # A1L5_p4_out;
A1L5 = A1L5_or_out;


--A1L6 is reduce_or~1124
A1L6_p1_out = B1_dffs[25] & B1_dffs[26] & B1_dffs[27];
A1L6_p2_out = B1_dffs[26] & B1_dffs[27] & !B1_dffs[24];
A1L6_p3_out = B1_dffs[25] & !B1_dffs[26] & !B1_dffs[27] & !B1_dffs[24];
A1L6_or_out = A1L6_p1_out # A1L6_p2_out # A1L6_p3_out;
A1L6 = A1L6_or_out;


--A1L7 is reduce_or~1129
A1L7_p1_out = !B1_dffs[25] & !B1_dffs[27] & !B1_dffs[26] & B1_dffs[24];
A1L7_p2_out = !B1_dffs[25] & !B1_dffs[27] & B1_dffs[26] & !B1_dffs[24];
A1L7_p3_out = B1_dffs[25] & B1_dffs[27] & !B1_dffs[26] & !B1_dffs[24];
A1L7_p4_out = B1_dffs[25] & B1_dffs[26] & B1_dffs[24];
A1L7_or_out = A1L7_p1_out # A1L7_p2_out # A1L7_p3_out # A1L7_p4_out;
A1L7 = A1L7_or_out;


--A1L8 is reduce_or~1134
A1L8_p1_out = B1_dffs[26] & !B1_dffs[24] & B1_dffs[25];
A1L8_p2_out = B1_dffs[26] & !B1_dffs[24] & B1_dffs[27];
A1L8_p3_out = B1_dffs[26] & B1_dffs[24] & !B1_dffs[25] & !B1_dffs[27];
A1L8_p4_out = B1_dffs[24] & B1_dffs[25] & B1_dffs[27];
A1L8_or_out = A1L8_p1_out # A1L8_p2_out # A1L8_p3_out # A1L8_p4_out;
A1L8 = A1L8_or_out;


--~VCC~0 is ~VCC~0
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--~VCC~1 is ~VCC~1
~VCC~1_or_out = GND;
~VCC~1 = !(~VCC~1_or_out);


--~VCC~2 is ~VCC~2
~VCC~2_or_out = GND;
~VCC~2 = !(~VCC~2_or_out);


--~VCC~3 is ~VCC~3
~VCC~3_or_out = GND;
~VCC~3 = !(~VCC~3_or_out);


--~VCC~4 is ~VCC~4
~VCC~4_or_out = GND;
~VCC~4 = !(~VCC~4_or_out);


--~VCC~5 is ~VCC~5
~VCC~5_or_out = GND;
~VCC~5 = !(~VCC~5_or_out);


--~VCC~6 is ~VCC~6
~VCC~6_or_out = GND;
~VCC~6 = !(~VCC~6_or_out);


--clock is clock
--operation mode is input

clock = INPUT();


--seg[7] is seg[7]
--operation mode is output

seg[7] = OUTPUT(~VCC~0);


--sl[0] is sl[0]
--operation mode is output

sl[0] = OUTPUT(~VCC~1);


--sl[1] is sl[1]
--operation mode is output

sl[1] = OUTPUT(~VCC~2);


--sl[2] is sl[2]
--operation mode is output

sl[2] = OUTPUT(~VCC~3);


--sl[3] is sl[3]
--operation mode is output

sl[3] = OUTPUT(~VCC~4);


--sl[4] is sl[4]
--operation mode is output

sl[4] = OUTPUT(~VCC~5);


--sl[5] is sl[5]
--operation mode is output

sl[5] = OUTPUT(~VCC~6);


--seg[4] is seg[4]
--operation mode is output

seg[4] = OUTPUT(A1L4);


--seg[5] is seg[5]
--operation mode is output

seg[5] = OUTPUT(A1L2);


--seg[6] is seg[6]
--operation mode is output

seg[6] = OUTPUT(A1L3);


--seg[0] is seg[0]
--operation mode is output

seg[0] = OUTPUT(A1L5);


--seg[1] is seg[1]
--operation mode is output

seg[1] = OUTPUT(A1L8);


--seg[2] is seg[2]
--operation mode is output

seg[2] = OUTPUT(A1L6);


--seg[3] is seg[3]
--operation mode is output

seg[3] = OUTPUT(A1L7);