ce_gao.v

来自「运用TLC5510A高速(20M),扫描出波形,测量相位差,两个TLC5510A」· Verilog 代码 · 共 42 行

module ce_gao(game,fc,CS,rest,data,addr,RD,jud1,jud2,jud3);
input  game,CS,fc,rest,RD,jud1;
input[1:0] addr;
output  jud2,jud3;
output[7:0] data;
reg[7:0] data;
reg[23:0] counter;
reg jud2,jud3;

always@(posedge game)        //上升沿打开阀门
  begin
   if(!rest)
    jud2<=0;
   else
   jud2<=1;
  end
always@(negedge game)        //下降沿来，有上升沿关阀门
 begin
   if(!rest)
    jud3<=0;
   else if(jud1)
    jud3<=1;
 end
always@(posedge fc)
	begin
		if(!rest)
			counter=0;
		else if(jud2&&!jud3)
			counter<=counter+1;
	end
always @(!CS or RD)
	begin
	case(addr)
	  0:data[7:0]<=counter[7:0];
	  1:data[7:0]<=counter[15:8];
	  2:data[7:0]<=counter[23:16];
	  default:
			data[7:0]<=8'hzz;
	endcase
	end

endmodule