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📄 core_1c6.map.rpt

📁 运用TLC5510A高速(20M),扫描出波形,测量相位差,两个TLC5510A测两个波形.
💻 RPT
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; ADDRESS_REG_B                      ; CLOCK1          ; Untyped                             ;
; OUTDATA_REG_B                      ; CLOCK1          ; Untyped                             ;
; BYTEENA_REG_B                      ; CLOCK1          ; Untyped                             ;
; INDATA_ACLR_B                      ; NONE            ; Untyped                             ;
; WRCONTROL_ACLR_B                   ; NONE            ; Untyped                             ;
; ADDRESS_ACLR_B                     ; NONE            ; Untyped                             ;
; OUTDATA_ACLR_B                     ; NONE            ; Untyped                             ;
; RDCONTROL_ACLR_B                   ; NONE            ; Untyped                             ;
; BYTEENA_ACLR_B                     ; NONE            ; Untyped                             ;
; WIDTH_BYTEENA_A                    ; 1               ; Integer                             ;
; WIDTH_BYTEENA_B                    ; 1               ; Untyped                             ;
; RAM_BLOCK_TYPE                     ; AUTO            ; Untyped                             ;
; BYTE_SIZE                          ; 8               ; Untyped                             ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE       ; Untyped                             ;
; INIT_FILE                          ; UNUSED          ; Untyped                             ;
; INIT_FILE_LAYOUT                   ; PORT_A          ; Untyped                             ;
; MAXIMUM_DEPTH                      ; 0               ; Untyped                             ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL          ; Untyped                             ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL          ; Untyped                             ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL          ; Untyped                             ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL          ; Untyped                             ;
; DEVICE_FAMILY                      ; Cyclone         ; Untyped                             ;
; CBXI_PARAMETER                     ; altsyncram_aqb1 ; Untyped                             ;
+------------------------------------+-----------------+-------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------+
; Parameter Settings for User Entity Instance: div_1000:inst33 ;
+----------------+-------+-------------------------------------+
; Parameter Name ; Value ; Type                                ;
+----------------+-------+-------------------------------------+
; bitsize        ; 9     ; Integer                             ;
; L              ; 999   ; Integer                             ;
+----------------+-------+-------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: ScanKey:inst15|altsyncram:reduce_or_rtl_0 ;
+------------------------------------+-------------------+-----------------------------------+
; Parameter Name                     ; Value             ; Type                              ;
+------------------------------------+-------------------+-----------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                 ; Untyped                           ;
; AUTO_CARRY_CHAINS                  ; ON                ; AUTO_CARRY                        ;
; IGNORE_CARRY_BUFFERS               ; OFF               ; IGNORE_CARRY                      ;
; AUTO_CASCADE_CHAINS                ; ON                ; AUTO_CASCADE                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF               ; IGNORE_CASCADE                    ;
; OPERATION_MODE                     ; ROM               ; Untyped                           ;
; WIDTH_A                            ; 5                 ; Untyped                           ;
; WIDTHAD_A                          ; 9                 ; Untyped                           ;
; NUMWORDS_A                         ; 512               ; Untyped                           ;
; OUTDATA_REG_A                      ; UNREGISTERED      ; Untyped                           ;
; ADDRESS_ACLR_A                     ; NONE              ; Untyped                           ;
; OUTDATA_ACLR_A                     ; NONE              ; Untyped                           ;
; WRCONTROL_ACLR_A                   ; NONE              ; Untyped                           ;
; INDATA_ACLR_A                      ; NONE              ; Untyped                           ;
; BYTEENA_ACLR_A                     ; NONE              ; Untyped                           ;
; WIDTH_B                            ; 1                 ; Untyped                           ;
; WIDTHAD_B                          ; 1                 ; Untyped                           ;
; NUMWORDS_B                         ; 1                 ; Untyped                           ;
; INDATA_REG_B                       ; CLOCK1            ; Untyped                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1            ; Untyped                           ;
; RDCONTROL_REG_B                    ; CLOCK1            ; Untyped                           ;
; ADDRESS_REG_B                      ; CLOCK1            ; Untyped                           ;
; OUTDATA_REG_B                      ; UNREGISTERED      ; Untyped                           ;
; BYTEENA_REG_B                      ; CLOCK1            ; Untyped                           ;
; INDATA_ACLR_B                      ; NONE              ; Untyped                           ;
; WRCONTROL_ACLR_B                   ; NONE              ; Untyped                           ;
; ADDRESS_ACLR_B                     ; NONE              ; Untyped                           ;
; OUTDATA_ACLR_B                     ; NONE              ; Untyped                           ;
; RDCONTROL_ACLR_B                   ; NONE              ; Untyped                           ;
; BYTEENA_ACLR_B                     ; NONE              ; Untyped                           ;
; WIDTH_BYTEENA_A                    ; 1                 ; Untyped                           ;
; WIDTH_BYTEENA_B                    ; 1                 ; Untyped                           ;
; RAM_BLOCK_TYPE                     ; AUTO              ; Untyped                           ;
; BYTE_SIZE                          ; 8                 ; Untyped                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE         ; Untyped                           ;
; INIT_FILE                          ; core_1c60.rtl.mif ; Untyped                           ;
; INIT_FILE_LAYOUT                   ; PORT_A            ; Untyped                           ;
; MAXIMUM_DEPTH                      ; 0                 ; Untyped                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL            ; Untyped                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL            ; Untyped                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL            ; Untyped                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL            ; Untyped                           ;
; DEVICE_FAMILY                      ; Cyclone           ; Untyped                           ;
; CBXI_PARAMETER                     ; altsyncram_r9l    ; Untyped                           ;
+------------------------------------+-------------------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in D:/Test_Phase/cexiang1/core_1c6.map.eqn.


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 5.1 Build 176 10/26/2005 SJ Full Version
    Info: Processing started: Sun Dec 03 16:17:51 2006
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off core_1c6 -c core_1c6
Info: Found 1 design units, including 1 entities, in source file fp_2.v
    Info: Found entity 1: fp_2
Info: Found 1 design units, including 1 entities, in source file pipeline_add_64.v
    Info: Found entity 1: pipeline_add_64
Info: Found 1 design units, including 1 entities, in source file data_ctl.v
    Info: Found entity 1: data_ctl
Info: Found 1 design units, including 1 entities, in source file bus_connect.v
    Info: Found entity 1: BUS_Connect
Info: Found 1 design units, including 1 entities, in source file scankey.v
    Info: Found entity 1: ScanKey
Info: Found 1 design units, including 1 entities, in source file asic74573.v
    Info: Found entity 1: ASIC74573
Warning: Can't analyze file -- file D:/Test_Phase/cexiang1/asic74138.v is missing
Info: Found 1 design units, including 1 entities, in source file core_1c6.bdf
    Info: Found entity 1: core_1c6
Info: Found 1 design units, including 1 entities, in source file RAM_ADDR.v
    Info: Found entity 1: RAM_ADDR
Info: Found 1 design units, including 1 entities, in source file ScanKey_4_4.v
    Info: Found entity 1: ScanKey_4_4
Info: Found 1 design units, including 1 entities, in source file add18.v
    Info: Found entity 1: add18
Warning: Can't analyze file -- file D:/Test_Phase/cexiang1/asic4_16.v is missing
Info: Found 1 design units, including 1 entities, in source file Adr4_16.v
    Info: Found entity 1: Adr4_16
Info: Found 1 design units, including 1 entities, in source file fp2.v
    Info: Found entity 1: fp2
Info: Found 1 design units, including 1 entities, in source file Tlc5510.v

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