mico8_demo.tcl

简单的8位CPU

########## Tcl recorder starts at 07/21/05 14:46:56 ##########

set version "5.0"
set proj_dir "C:/anto_2005/reference_design/latticexp/isp8/isp8_demo/par/top"
cd $proj_dir

# Get directory paths
set pver $version
regsub -all {\.} $pver {_} pver
set lscfile "lsc_"
append lscfile $pver ".ini"
set lsvini_dir [lindex [array get env LSC_INI_PATH] 1]
set lsvini_path [file join $lsvini_dir $lscfile]
if {[catch {set fid [open $lsvini_path]} msg]} {
	 puts "File Open Error: $lsvini_path"
	 return false
} else {set data [read $fid]; close $fid }
foreach line [split $data '\n'] { 
	set lline [string tolower $line]
	set lline [string trim $lline]
	if {[string compare $lline "\[paths\]"] == 0} { set path 1; continue}
	if {$path && [regexp {^\[} $lline]} {set path 0; break}
	if {$path && [regexp {^bin} $lline]} {set cpld_bin $line; continue}
	if {$path && [regexp {^fpgapath} $lline]} {set fpga_dir $line}}

set cpld_bin [string range $cpld_bin [expr [string first "=" $cpld_bin]+1] end]
regsub -all "\"" $cpld_bin "" cpld_bin
set cpld_bin [file join $cpld_bin]
set install_dir [string range $cpld_bin 0 [expr [string first "ispcpld" $cpld_bin]-2]]
regsub -all "\"" $install_dir "" install_dir
set install_dir [file join $install_dir]
set fpga_dir [string range $fpga_dir [expr [string first "=" $fpga_dir]+1] end]
regsub -all "\"" $fpga_dir "" fpga_dir
set fpga_dir [file join $fpga_dir]

switch $tcl_platform(platform) {
   windows {
      set fpga_bin [file join $fpga_dir "bin" "nt"]
	     if {[string match "*$fpga_bin;*" $env(PATH)] == 0 } {
	        set env(PATH) "$fpga_bin;$env(PATH)" } }
   unix {
      set fpga_bin [file join $fpga_dir "bin" "sol"]
      if {[string match "*$fpga_bin;*" $env(PATH)] == 0 } {
         set env(PATH) "$fpga_bin;$env(PATH)"}}}

if {[string match "*$cpld_bin;*" $env(PATH)] == 0 } {
   set env(PATH) "$cpld_bin;$env(PATH)" }

lappend auto_path [file join $install_dir "ispcpld" "tcltk" "lib" "ispwidget" "runproc"]
package require runcmd

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/edfin\" -i ../../synthesis/top/rev_1/isp8_top_system.edn -jhd isp8_top_system.jhd -log isp8_top_system.log -dev orca -lbp \"$fpga_dir/data\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 07/21/05 14:46:56 ###########


########## Tcl recorder starts at 07/21/05 14:47:33 ##########

# Commands to make the Process: 
# Map Design
if [runCmd "\"$fpga_bin/edif2ngd\" -l mg5g00 -d lfxp10c \"../../synthesis/top/rev_1/isp8_top_system.edn\" \"isp8_top_system.ngo\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$fpga_bin/edif2ngd\" -l mg5g00 -d lfxp10c \"../../synthesis/top/rev_1/isp8_top_system.edn\" \"isp8_top_system.ngo\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/edfmodgen\" -inp \"../../synthesis/top/rev_1/isp8_top_system.edn\" -log \"isp8_top_system.emg\" -arch mg5g00 -dev lfxp10c"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/edfmodgen\" -inp \"../../synthesis/top/rev_1/isp8_top_system.edn\" -log \"isp8_top_system.emg\" -arch mg5g00 -dev lfxp10c"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$fpga_bin/edfupdate\" -t \"mico8_demo.tcy\" -w \"isp8_top_system.ngo\" -m \"isp8_top_system.ngo\" \"mico8_demo.ngx\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$fpga_bin/ngdbuild\" -a mg5g00 -d lfxp10c -p \"$proj_dir\" \"isp8_top_system.ngo\" \"mico8_demo.ngd\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$fpga_bin/map\" -a mg5g00 -p lfxp10c -t fpbga388 -s 5 \"mico8_demo.ngd\" -o \"mico8_demo_map.ncd\" -mp \"mico8_demo.mrp\" \"mico8_demo.prf\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 07/21/05 14:47:33 ###########


########## Tcl recorder starts at 07/21/05 14:48:29 ##########

# Commands to make the Process: 
# Pre-Map Preference Editor
# - none -
# Application to view the Process: 
# Pre-Map Preference Editor
if [runCmd "\"$cpld_bin/prfedit\" -src mico8_demo.ngd -premap -a mg5g00 -p lfxp10c -t fpbga388 -prf mico8_demo.prf"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 07/21/05 14:48:29 ###########


########## Tcl recorder starts at 07/21/05 14:49:04 ##########

# Commands to make the Process: 
# Map Design
if [runCmd "\"$fpga_bin/ngdbuild\" -a mg5g00 -d lfxp10c -p \"$proj_dir\" \"isp8_top_system.ngo\" \"mico8_demo.ngd\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$fpga_bin/map\" -a mg5g00 -p lfxp10c -t fpbga388 -s 5 \"mico8_demo.ngd\" -o \"mico8_demo_map.ncd\" -mp \"mico8_demo.mrp\" \"mico8_demo.prf\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 07/21/05 14:49:04 ###########


########## Tcl recorder starts at 07/21/05 14:54:45 ##########

# Commands to make the Process: 
# Hierarchy
if [runCmd "\"$cpld_bin/edfin\" -i ../../synthesis/top/rev_1/isp8_top_system.edn -jhd isp8_top_system.jhd -log isp8_top_system.log -dev orca -lbp \"$fpga_dir/data\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 07/21/05 14:54:45 ###########


########## Tcl recorder starts at 07/21/05 14:54:45 ##########

# Commands to make the Process: 
# Map Design
if [runCmd "\"$fpga_bin/edif2ngd\" -l mg5g00 -d lfxp10c \"../../synthesis/top/rev_1/isp8_top_system.edn\" \"isp8_top_system.ngo\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$fpga_bin/edif2ngd\" -l mg5g00 -d lfxp10c \"../../synthesis/top/rev_1/isp8_top_system.edn\" \"isp8_top_system.ngo\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/edfmodgen\" -inp \"../../synthesis/top/rev_1/isp8_top_system.edn\" -log \"isp8_top_system.emg\" -arch mg5g00 -dev lfxp10c"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$cpld_bin/edfmodgen\" -inp \"../../synthesis/top/rev_1/isp8_top_system.edn\" -log \"isp8_top_system.emg\" -arch mg5g00 -dev lfxp10c"] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$fpga_bin/edfupdate\" -t \"mico8_demo.tcy\" -w \"isp8_top_system.ngo\" -m \"isp8_top_system.ngo\" \"mico8_demo.ngx\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$fpga_bin/ngdbuild\" -a mg5g00 -d lfxp10c -p \"$proj_dir\" \"isp8_top_system.ngo\" \"mico8_demo.ngd\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
if [runCmd "\"$fpga_bin/map\" -a mg5g00 -p lfxp10c -t fpbga388 -s 5 \"mico8_demo.ngd\" -o \"mico8_demo_map.ncd\" -mp \"mico8_demo.mrp\" \"mico8_demo.prf\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}

########## Tcl recorder end at 07/21/05 14:54:45 ###########


########## Tcl recorder starts at 07/21/05 14:54:57 ##########

# Commands to make the Process: 
# Generate Data File (JEDEC)
if [catch {open mico8_demo.cm2 w} rspFile] {
	puts stderr "Cannot create response file mico8_demo.cm2: $rspFile"
} else {
	puts $rspFile "-t mico8_demo.mt
-to mico8_demo.tw1
-o mico8_demo.tcm
-log mico8_demo.log
-pr mico8_demo.prf
-rpt mico8_demo.mrp
"
	close $rspFile
}
if [runCmd "\"$cpld_bin/checkpoint\" -m -f \"mico8_demo.cmm\" -f \"mico8_demo.cm2\" -arch mg5g00 \"mico8_demo_map.ncd\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}
file delete mico8_demo.cm2
if [catch {open mico8_demo.p2t w} rspFile] {
	puts stderr "Cannot create response file mico8_demo.p2t: $rspFile"
} else {
	puts $rspFile "-w
-i 6
-l 5
-n 1
-t 1
-s 1
-c 0
-e 0
"
	close $rspFile
}
if [catch {open mico8_demo.p3t w} rspFile] {
	puts stderr "Cannot create response file mico8_demo.p3t: $rspFile"
} else {
	puts $rspFile "-rem
-log mico8_demo.log
-o mico8_demo.par
-pr mico8_demo.prf
"
	close $rspFile
}
if [runCmd "\"$cpld_bin/multipar\" -p mico8_demo.p2t -f \"mico8_demo.p3t\" \"mico8_demo_map.ncd\" \"mico8_demo.ncd\""] {
	return
} else {
	vwait done
	if [checkResult $done] {
		return
	}
}