isp8_cfg.v

来自「简单的8位CPU」· Verilog 代码 · 共 47 行

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// Copyright 2000-2001 (c) Lattice Semiconductor Corporation
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// from Lattice Semiconductor Corporation.
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// =============================================================================
//                         FILE DETAILS
// Project          : isp8
// File             : isp8_cfg.v
// Title            :
// Dependencies     : 
// Description      : User defined Configuration parameters for isp8.    
// =============================================================================
//                        REVISION HISTORY
// Version          : 1.0
// Author(s)        : Umesh Ananthiah
// Mod. Date        : May 05, 2005
// Changes Made     : Initial Creation
// =============================================================================

// If defined, Register file will have 16 registers (r0 - r15)
// Default is 32 registers ((r0 - r31)
`define REGISTERS_16

// If defined, Internal scratch pad memory is 16 bytes. 
// Default is 32 bytes
`define SCRATCH_PAD_MEM_16

// If defined, there is external scratch pad memory. 
// Default: No external scratch pad memory.
//`define EXT_SP_MEM

// The value defines the address bus width for external
// memory/IO access ("ext_addr")
`define EXT_AW   8

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