isp8_top_system.tlg

简单的8位CPU

@W: CL169 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":405:0:405:5|Pruning Register tst_reg12_addr 

@W: CL169 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":405:0:405:5|Pruning Register tst_reg28_addr 

@W: CL169 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":405:0:405:5|Pruning Register tst_reg13_addr 

@W: CL169 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":405:0:405:5|Pruning Register tst_reg29_addr 

@W: CL169 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":405:0:405:5|Pruning Register tst_reg14_addr 

@W: CL169 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":405:0:405:5|Pruning Register tst_reg30_addr 

@W: CL169 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":405:0:405:5|Pruning Register tst_reg15_addr 

@W: CL169 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":405:0:405:5|Pruning Register tst_reg31_addr 

@W: CL112 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":609:0:609:5|Feedback mux created for signal ext_io_din[7:0]. Did you forget the set/reset assignment for this signal?
@W: CL190 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":609:0:609:5|Optimizing register bit ISP_INSTR_REG[18] to a constant 0
@W: CL190 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":609:0:609:5|Optimizing register bit ISP_INSTR_REG[19] to a constant 0
@W: CL190 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":609:0:609:5|Optimizing register bit ISP_INSTR_REG[20] to a constant 0
@W: CL190 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":609:0:609:5|Optimizing register bit ISP_INSTR_REG[21] to a constant 0
@W: CL190 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":609:0:609:5|Optimizing register bit ISP_INSTR_REG[22] to a constant 0
@W: CL190 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":609:0:609:5|Optimizing register bit ISP_INSTR_REG[23] to a constant 0
@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":76:12:76:23|Input port bit <11> of tst_sys_addr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":76:12:76:23|Input port bit <10> of tst_sys_addr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":76:12:76:23|Input port bit <9> of tst_sys_addr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v":76:12:76:23|Input port bit <8> of tst_sys_addr[17:0] is unused

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":1115:7:1115:15|Synthesizing module isp8_idec

@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":1178:13:1178:15|Input clk is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":1179:13:1179:17|Input rst_n is unused
@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":184:7:184:12|Synthesizing module FADSU2

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":1077:7:1077:13|Synthesizing module addsub8

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":913:7:913:14|Synthesizing module isp8_alu

@W: CG133 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":973:13:973:21|No assignment to carry_int
@W:"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":979:13:979:24|No assignment to wire data_rb_comp

@W:"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":1006:11:1006:16|No assignment to wire alu_op

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <13> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <12> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <11> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <10> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <9> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <8> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <7> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <6> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <5> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <4> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <3> of instr[17:0] is unused

@W: CL209 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":948:13:948:17|Input port bit <2> of instr[17:0] is unused

@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":945:13:945:15|Input clk is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":946:13:946:17|Input rst_n is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":956:12:956:14|Input add is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":958:12:958:14|Input mov is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":959:12:959:15|Input andr is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":960:12:960:14|Input orr is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":961:12:961:15|Input xorr is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":963:12:963:15|Input test is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":964:12:964:14|Input ror is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":965:12:965:15|Input rorc is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":966:12:966:14|Input rol is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":967:12:967:15|Input rolc is unused
@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":213:7:213:10|Synthesizing module AND2

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":1478:7:1478:9|Synthesizing module VLO

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":119:7:119:14|Synthesizing module SPR16X2B

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\spram16x9.v":7:7:7:15|Synthesizing module spram16x9

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":622:7:622:20|Synthesizing module isp8_flow_cntl

@N: CG179 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":755:19:755:27|Removing redundant assignment
@N: CG179 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":812:26:812:35|Removing redundant assignment
@N: CG179 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":831:25:831:33|Removing redundant assignment
@N: CG179 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":844:30:844:36|Removing redundant assignment
@N: CG179 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":857:32:857:39|Removing redundant assignment
@N: CG179 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":872:22:872:33|Removing redundant assignment
@N: CG179 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":873:22:873:32|Removing redundant assignment
@W: CG133 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":704:23:704:31|No assignment to din_stack
@W: CL169 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":900:0:900:5|Pruning Register wren_stack 

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":900:7:900:9|Synthesizing module INV

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":219:8:219:11|Synthesizing module AND3

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":939:7:939:11|Synthesizing module MUX21

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\spram32x8.v":7:7:7:15|Synthesizing module spram32x8

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":478:7:478:18|Synthesizing module isp8_io_cntl

@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":524:22:524:25|Input lspi is unused
@W: CL159 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":528:22:528:28|Input addr_rd is unused
@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":1473:7:1473:9|Synthesizing module VHI

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":1583:7:1583:11|Synthesizing module SP8KA

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\prom.v":7:7:7:10|Synthesizing module prom

@W: CL168 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\prom.v":15:8:15:21|Pruning instance scuba_vhi_inst - not in use ...

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":135:7:135:14|Synthesizing module DPR16X2B

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\dpram32x8.v":7:7:7:15|Synthesizing module dpram32x8

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":699:7:699:9|Synthesizing module GSR

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v":1382:7:1382:9|Synthesizing module PUR

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":32:7:32:10|Synthesizing module isp8

@W:"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":104:23:104:29|No assignment to wire addr_rf

@W:"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":114:23:114:30|No assignment to wire mem_data

@W:"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":115:23:115:33|No assignment to wire int_mem_enb

@W: CL168 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v":351:4:351:11|Pruning instance PUR_INST - not in use ...

@N: CG364 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v":29:7:29:21|Synthesizing module isp8_top_system

@W: CS148 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v":139:14:139:29|Undriven input isp_carry_flag, tying to 0
@W: CS148 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v":139:14:139:29|Undriven input isp_instr, tying to 0
@W: CS148 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v":139:14:139:29|Undriven input isp_dout_alu, tying to 0
@W: CS148 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v":139:14:139:29|Undriven input isp_cout_alu, tying to 0
@W: CS148 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v":139:14:139:29|Undriven input isp_call_cmd, tying to 0
@W: CS148 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v":139:14:139:29|Undriven input isp_ret_cmd, tying to 0
@W: CS148 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v":139:14:139:29|Undriven input isp_bz_cmd, tying to 0
@W: CG133 :"C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v":80:6:80:19|No assignment to decoder_en_reg