isp8_top_system.srs

简单的8位CPU

#
#
#
# Created by Synplify Verilog HDL Compiler version 3.0.0, Build 286R from Synplicity, Inc.
# Copyright 1994-2004 Synplicity, Inc. , All rights reserved.
# Synthesis Netlist written on Thu Jul 21 15:02:27 2005
#
#
#OPTIONS:"|-fixsmult|-IC:\\Anto_2005\\Reference_Design\\isp8\\source\\config1\\|-IC:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\test\\|-IC:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\synthesis\\top\\|-IC:\\ispTOOLS5_0\\synpbase\\lib|-v2001|-autosm|-fid2|-sharing|on|-encrypt|-ui|-ram"
#CUR:"C:\\ispTOOLS5_0\\synpbase\\bin\\c_ver.exe":1105668864
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\dpram32x8.v":1118078948
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\dpram32x8.v":1118078948
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\prom.v":1121729108
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\prom.v":1121729108
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\test\\prom_init.v":1121981782
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\test\\prom_init.v":1121981782
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\test\\prom_init.v":1121981782
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\test\\prom_init.v":1121981782
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\source\\isp8.v":1121877239
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\source\\isp8.v":1121877239
#CUR:"C:\\Anto_2005\\Reference_Design\\isp8\\source\\config1\\isp8_cfg.v":1121284625
#CUR:"C:\\Anto_2005\\Reference_Design\\isp8\\source\\config1\\isp8_cfg.v":1121284625
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\spram32x8.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\spram32x8.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\spram16x8.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\spram16x8.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\spram16x9.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\spram16x9.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\spram16x10.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\spram16x10.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\xp.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\models\\xp\\syn\\xp.v":1118078950
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\test_register\\test_register.v":1121982110
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\test_register\\test_register.v":1121982110
#CUR:"C:\\Anto_2005\\Reference_Design\\isp8\\source\\config1\\isp8_cfg.v":1121284625
#CUR:"C:\\Anto_2005\\Reference_Design\\isp8\\source\\config1\\isp8_cfg.v":1121284625
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\orcastra_inf\\orcastra_inf.v":1121982125
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\orcastra_inf\\orcastra_inf.v":1121982125
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\led_decoder\\led_decoder.v":1121982156
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\led_decoder\\led_decoder.v":1121982156
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\light_maker\\light_maker.v":1121982141
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\light_maker\\light_maker.v":1121982141
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\top\\isp8_top_system.v":1121982731
#CUR:"C:\\Anto_2005\\Reference_Design\\LatticeXP\\isp8\\isp8_demo\\source\\top\\isp8_top_system.v":1121982731
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\dpram32x8.v"; # file 0
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\prom.v"; # file 1
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\test\prom_init.v"; # file 2
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\test\prom_init.v"; # file 3
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\source\isp8.v"; # file 4
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\isp8\source\config1\isp8_cfg.v"; # file 5
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\spram32x8.v"; # file 6
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\spram16x8.v"; # file 7
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\spram16x9.v"; # file 8
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\spram16x10.v"; # file 9
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\models\xp\syn\xp.v"; # file 10
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\test_register\test_register.v"; # file 11
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\isp8\source\config1\isp8_cfg.v"; # file 12
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\orcastra_inf\orcastra_inf.v"; # file 13
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\led_decoder\led_decoder.v"; # file 14
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\light_maker\light_maker.v"; # file 15
af .is_verilog 1;
f "C:\Anto_2005\Reference_Design\LatticeXP\isp8\isp8_demo\source\top\isp8_top_system.v"; # file 16
af .is_verilog 1;
@E
@ 
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b@d@4:4.4::44.:44cN6RMR8PD8FN_osC.D4RF_N8s.Co4FRDNC8_MMRk4s_I_DFM$b;
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Rj@@:44::.4:RPHMR4kM_00#_D#C_#j_JGlkNR_.k_M40_#0#_CDjJ_#lNkG_k.RM04_##0_CjD__l#Jk_GN4b;
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-y---------------------------------

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