isp8.tcl

简单的8位CPU

# =============================================================================
#                           COPYRIGHT NOTICE
# Copyright 2000-2001 (c) Lattice Semiconductor Corporation
# ALL RIGHTS RESERVED
# This confidential and proprietary software may be used only as authorised by
# a licensing agreement from Lattice Semiconductor Corporation.
# The entire notice above must be reproduced on all authorized copies and
# copies may only be made to the extent permitted by a licensing agreement from
# Lattice Semiconductor Corporation.
#
# Lattice Semiconductor Corporation        TEL : 1-800-Lattice (USA and Canada)
# 5555 NE Moore Court                            408-826-6000 (other locations)
# Hillsboro, OR 97124                     web  : http://www.latticesemi.com/
# U.S.A                                   email: [e-mail]
# =============================================================================
#                         FILE DETAILS
# Project          : isp8
# File             : isp8.tcl
# Title            :
# Dependencies     : 
# Description      : tcl script to synthesis in Precision.
# =============================================================================
#                        REVISION HISTORY
# Version          : 1.0
# Author(s)        : Umesh Ananthiah
# Mod. Date        : May 17, 2005
# Changes Made     : Initial Creation
# =============================================================================

set PROJPATH C:/isp8_sb

new_project -name isp8 -folder $PROJPATH/synthesis/xp/precision/config1 -force

set_working_dir $PROJPATH/synthesis/xp/precision/config1                    
new_impl -name impl_1 -force -discard                            

#device options                               
setup_design -manufacturer Lattice -family LatticeEC -part LFEC3E -package TQFP144 -speed 3  

# Compilation/mapping options                 
setup_design -addio
setup_design -vhdl=false  
setup_design -verilog=false 
setup_design -edif  
setup_design -transformations  
setup_design -retiming=false  
setup_design -advanced_fsm_optimization  
setup_design -compile_for_area  
setup_design -use_safe_fsm=false  
setup_design -encoding="auto"  
setup_design -resource_sharing  
setup_design -array_bounds_check=false  
setup_design -transform_tristates="auto"  
setup_design -input_delay=""  
setup_design -output_delay=""  
setup_design -partition_size="30000"  
setup_design -global_clock_limit=""  
setup_design -search_path=""  
setup_design -frontend_2004  
setup_design -variable parallel_case=TRUE
setup_design -verilog_2001  
setup_design -generics=""  
setup_design -defines=""  
setup_design -automap_work=false  
setup_design -error_design_contention=false  
setup_design -ignore_ram_rw_collision=false  
setup_design -translate_ucf_constraints=false  

# add configuration file. 
   add_input_file $PROJPATH/source/config1/isp8_cfg.v

# add model files. 
   add_input_file $PROJPATH/models/xp/sim/prom.v
   add_input_file $PROJPATH/models/xp/sim/dpram32x8.v
   add_input_file $PROJPATH/models/xp/sim/dpram16x8.v
   add_input_file $PROJPATH/models/xp/sim/spram32x8.v
   add_input_file $PROJPATH/models/xp/sim/spram16x8.v
   add_input_file $PROJPATH/models/xp/sim/spram16x9.v
   add_input_file $PROJPATH/models/xp/syn/xp.v

# Add top level files. 
   add_input_file $PROJPATH/source/isp8.v

# Map options                                 
setup_design -frequency 100                

# Set result file                             
setup_design -basename isp8                   

# Run synthesis                               
compile                              
synthesize                                                     

# save project                                
save_impl  
#close_project 

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