hc245_8.txt

实现8通道模拟/数字转换和数字/模拟转换的例子,采用ISA总线控制逻辑

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


entity HC245_8 is
   port(A, B : inout std_logic_vector(7 downto 0);
         DIR, GBAR : in std_logic);
end HC245_8;

architecture VER1 of HC245_8 is
begin
   A <= B when (GBAR = '0') and (DIR = '0') else (others => 'Z');
   B <= A when (GBAR = '0') and (DIR = '1') else (others => 'Z');
end VER1;