mcu_sram_test.map.qmsg

verilog编写基于FPGA的示波器核心实现

{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|mcu_sram_test\|mcu_fpga_control:inst8\|osc_mod_state 3 " "Info: State machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|osc_mod_state\" contains 3 states" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 310 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mcu_sram_test\|osc:inst2\|osc_control:inst\|state " "Info: Selected Auto state machine encoding method for state machine \"\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state\"" {  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state " "Info: Encoding result for state machine \"\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_control:inst\|state.WAIT2 " "Info: Encoded state bit \"osc:inst2\|osc_control:inst\|state.WAIT2\"" {  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_control:inst\|state.WAIT1 " "Info: Encoded state bit \"osc:inst2\|osc_control:inst\|state.WAIT1\"" {  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_control:inst\|state.ALLIN " "Info: Encoded state bit \"osc:inst2\|osc_control:inst\|state.ALLIN\"" {  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_control:inst\|state.IDLE " "Info: Encoded state bit \"osc:inst2\|osc_control:inst\|state.IDLE\"" {  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state.IDLE 0000 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state.IDLE\" uses code string \"0000\"" {  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state.WAIT1 0101 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state.WAIT1\" uses code string \"0101\"" {  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state.ALLIN 0011 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state.ALLIN\" uses code string \"0011\"" {  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state.WAIT2 1001 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_control:inst\|state.WAIT2\" uses code string \"1001\"" {  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "osc_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_control.v" 28 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state " "Info: Selected Auto state machine encoding method for state machine \"\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state " "Info: Encoding result for state machine \"\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "7 " "Info: Completed encoding using 7 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_display:inst3\|state.NEWCOUNT " "Info: Encoded state bit \"osc:inst2\|osc_display:inst3\|state.NEWCOUNT\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_display:inst3\|state.COMPARE5 " "Info: Encoded state bit \"osc:inst2\|osc_display:inst3\|state.COMPARE5\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_display:inst3\|state.COMPARE4 " "Info: Encoded state bit \"osc:inst2\|osc_display:inst3\|state.COMPARE4\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_display:inst3\|state.COMPARE3 " "Info: Encoded state bit \"osc:inst2\|osc_display:inst3\|state.COMPARE3\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_display:inst3\|state.COMPARE2 " "Info: Encoded state bit \"osc:inst2\|osc_display:inst3\|state.COMPARE2\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_display:inst3\|state.COMPARE1 " "Info: Encoded state bit \"osc:inst2\|osc_display:inst3\|state.COMPARE1\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "osc:inst2\|osc_display:inst3\|state.GET " "Info: Encoded state bit \"osc:inst2\|osc_display:inst3\|state.GET\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.GET 0000000 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.GET\" uses code string \"0000000\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE4 0010001 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE4\" uses code string \"0010001\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE3 0001001 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE3\" uses code string \"0001001\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.NEWCOUNT 1000001 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.NEWCOUNT\" uses code string \"1000001\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE2 0000101 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE2\" uses code string \"0000101\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE1 0000011 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE1\" uses code string \"0000011\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE5 0100001 " "Info: State \"\|mcu_sram_test\|osc:inst2\|osc_display:inst3\|state.COMPARE5\" uses code string \"0100001\"" {  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "osc_display.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/osc_display.v" 36 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mcu_sram_test\|sram_control:inst4\|state " "Info: Selected Auto state machine encoding method for state machine \"\|mcu_sram_test\|sram_control:inst4\|state\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mcu_sram_test\|sram_control:inst4\|state " "Info: Encoding result for state machine \"\|mcu_sram_test\|sram_control:inst4\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "6 " "Info: Completed encoding using 6 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "sram_control:inst4\|state.RD_ADDRNEW " "Info: Encoded state bit \"sram_control:inst4\|state.RD_ADDRNEW\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "sram_control:inst4\|state.RD_DATANEW " "Info: Encoded state bit \"sram_control:inst4\|state.RD_DATANEW\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "sram_control:inst4\|state.WR_ADDRNEW " "Info: Encoded state bit \"sram_control:inst4\|state.WR_ADDRNEW\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "sram_control:inst4\|state.WR_DATANEW " "Info: Encoded state bit \"sram_control:inst4\|state.WR_DATANEW\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "sram_control:inst4\|state.READY " "Info: Encoded state bit \"sram_control:inst4\|state.READY\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "sram_control:inst4\|state.IDLE " "Info: Encoded state bit \"sram_control:inst4\|state.IDLE\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|sram_control:inst4\|state.IDLE 000000 " "Info: State \"\|mcu_sram_test\|sram_control:inst4\|state.IDLE\" uses code string \"000000\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|sram_control:inst4\|state.WR_ADDRNEW 001001 " "Info: State \"\|mcu_sram_test\|sram_control:inst4\|state.WR_ADDRNEW\" uses code string \"001001\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|sram_control:inst4\|state.RD_ADDRNEW 100001 " "Info: State \"\|mcu_sram_test\|sram_control:inst4\|state.RD_ADDRNEW\" uses code string \"100001\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|sram_control:inst4\|state.WR_DATANEW 000101 " "Info: State \"\|mcu_sram_test\|sram_control:inst4\|state.WR_DATANEW\" uses code string \"000101\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|sram_control:inst4\|state.READY 000011 " "Info: State \"\|mcu_sram_test\|sram_control:inst4\|state.READY\" uses code string \"000011\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|sram_control:inst4\|state.RD_DATANEW 010001 " "Info: State \"\|mcu_sram_test\|sram_control:inst4\|state.RD_DATANEW\" uses code string \"010001\"" {  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "sram_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/sram_control.v" 57 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state " "Info: Selected Auto state machine encoding method for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state " "Info: Encoding result for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|rd_state.RD_LOW_T " "Info: Encoded state bit \"mcu_fpga_control:inst8\|rd_state.RD_LOW_T\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|rd_state.RD_LOW " "Info: Encoded state bit \"mcu_fpga_control:inst8\|rd_state.RD_LOW\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|rd_state.RD_HIGH_T " "Info: Encoded state bit \"mcu_fpga_control:inst8\|rd_state.RD_HIGH_T\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|rd_state.RD_HIGH " "Info: Encoded state bit \"mcu_fpga_control:inst8\|rd_state.RD_HIGH\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state.RD_HIGH 0000 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state.RD_HIGH\" uses code string \"0000\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state.RD_LOW 0101 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state.RD_LOW\" uses code string \"0101\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state.RD_HIGH_T 0011 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state.RD_HIGH_T\" uses code string \"0011\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state.RD_LOW_T 1001 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_state.RD_LOW_T\" uses code string \"1001\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 74 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state " "Info: Selected Auto state machine encoding method for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state " "Info: Encoding result for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_state.WR_VOID " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_state.WR_VOID\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_state.WR_CMD " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_state.WR_CMD\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_state.WR_DATA2 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_state.WR_DATA2\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_state.WR_DATA1 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_state.WR_DATA1\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state.WR_DATA1 0000 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state.WR_DATA1\" uses code string \"0000\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state.WR_CMD 0101 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state.WR_CMD\" uses code string \"0101\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state.WR_DATA2 0011 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state.WR_DATA2\" uses code string \"0011\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state.WR_VOID 1001 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_state.WR_VOID\" uses code string \"1001\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 68 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state " "Info: Selected Auto state machine encoding method for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state " "Info: Encoding result for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "3 " "Info: Completed encoding using 3 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_ca_state.100 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_ca_state.100\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_ca_state.010 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_ca_state.010\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_ca_state.001 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_ca_state.001\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state.100 000 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state.100\" uses code string \"000\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state.001 101 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state.001\" uses code string \"101\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state.010 110 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ca_state.010\" uses code string \"110\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state " "Info: Selected Auto state machine encoding method for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state " "Info: Encoding result for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "3 " "Info: Completed encoding using 3 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_dsram_state.100 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_dsram_state.100\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_dsram_state.010 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_dsram_state.010\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_dsram_state.001 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_dsram_state.001\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state.100 000 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state.100\" uses code string \"000\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state.001 101 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state.001\" uses code string \"101\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state.010 110 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_dsram_state.010\" uses code string \"110\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state " "Info: Selected Auto state machine encoding method for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state " "Info: Encoding result for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "3 " "Info: Completed encoding using 3 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_ad_state.100 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_ad_state.100\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_ad_state.010 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_ad_state.010\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|wr_ad_state.001 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|wr_ad_state.001\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state.100 000 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state.100\" uses code string \"000\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state.001 101 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state.001\" uses code string \"101\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state.010 110 " "Info: State \"\|mcu_sram_test\|mcu_fpga_control:inst8\|wr_ad_state.010\" uses code string \"110\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 307 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mcu_sram_test\|mcu_fpga_control:inst8\|rd_ca_state " "Info: Selected Auto state machine encoding method for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_ca_state\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test/fpge示波器/mcu_sram beta1.1/mcu_fpga_control.v" 308 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_ca_state " "Info: Encoding result for state machine \"\|mcu_sram_test\|mcu_fpga_control:inst8\|rd_ca_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "3 " "Info: Completed encoding using 3 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "mcu_fpga_control:inst8\|rd_ca_state.100 " "Info: Encoded state bit \"mcu_fpga_control:inst8\|rd_ca_state.100\"" {  } { { "mcu_fpga_control.v" "" { Text "F:/fpga test