timeset.hier_info

基于FPGA的多功能数字钟的设计与实现 内附有详尽的Verilog HDL源码

|timeset
TimeSet_EN => disp_drive~3.OUTPUTSELECT
TimeSet_EN => disp_drive~4.OUTPUTSELECT
TimeSet_EN => disp_drive~5.OUTPUTSELECT
SW1 => disp_drive[1]~reg0.CLK
SW1 => disp_drive[0]~reg0.CLK
SW1 => disp_drive[2]~reg0.CLK
SW2 => hour_set1[2]~reg0.CLK
SW2 => hour_set1[1]~reg0.CLK
SW2 => hour_set1[0]~reg0.CLK
SW2 => hour_set0[3]~reg0.CLK
SW2 => hour_set0[2]~reg0.CLK
SW2 => hour_set0[1]~reg0.CLK
SW2 => hour_set0[0]~reg0.CLK
SW2 => minute_set1[3]~reg0.CLK
SW2 => minute_set1[2]~reg0.CLK
SW2 => minute_set1[1]~reg0.CLK
SW2 => minute_set1[0]~reg0.CLK
SW2 => minute_set0[3]~reg0.CLK
SW2 => minute_set0[2]~reg0.CLK
SW2 => minute_set0[1]~reg0.CLK
SW2 => minute_set0[0]~reg0.CLK
SW2 => second_set1[3]~reg0.CLK
SW2 => second_set1[2]~reg0.CLK
SW2 => second_set1[1]~reg0.CLK
SW2 => second_set1[0]~reg0.CLK
SW2 => second_set0[3]~reg0.CLK
SW2 => second_set0[2]~reg0.CLK
SW2 => second_set0[1]~reg0.CLK
SW2 => second_set0[0]~reg0.CLK
SW2 => hour_set1[3]~reg0.CLK
hour1[0] => ~NO_FANOUT~
hour1[1] => ~NO_FANOUT~
hour1[2] => ~NO_FANOUT~
hour1[3] => ~NO_FANOUT~
hour0[0] => ~NO_FANOUT~
hour0[1] => ~NO_FANOUT~
hour0[2] => ~NO_FANOUT~
hour0[3] => ~NO_FANOUT~
minute1[0] => ~NO_FANOUT~
minute1[1] => ~NO_FANOUT~
minute1[2] => ~NO_FANOUT~
minute1[3] => ~NO_FANOUT~
minute0[0] => ~NO_FANOUT~
minute0[1] => ~NO_FANOUT~
minute0[2] => ~NO_FANOUT~
minute0[3] => ~NO_FANOUT~
second1[0] => ~NO_FANOUT~
second1[1] => ~NO_FANOUT~
second1[2] => ~NO_FANOUT~
second1[3] => ~NO_FANOUT~
second0[0] => ~NO_FANOUT~
second0[1] => ~NO_FANOUT~
second0[2] => ~NO_FANOUT~
second0[3] => ~NO_FANOUT~
hour_set1[0] <= hour_set1[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
hour_set1[1] <= hour_set1[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
hour_set1[2] <= hour_set1[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
hour_set1[3] <= hour_set1[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
hour_set0[0] <= hour_set0[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
hour_set0[1] <= hour_set0[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
hour_set0[2] <= hour_set0[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
hour_set0[3] <= hour_set0[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
minute_set1[0] <= minute_set1[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
minute_set1[1] <= minute_set1[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
minute_set1[2] <= minute_set1[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
minute_set1[3] <= minute_set1[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
minute_set0[0] <= minute_set0[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
minute_set0[1] <= minute_set0[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
minute_set0[2] <= minute_set0[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
minute_set0[3] <= minute_set0[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_set1[0] <= second_set1[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_set1[1] <= second_set1[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_set1[2] <= second_set1[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_set1[3] <= second_set1[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_set0[0] <= second_set0[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_set0[1] <= second_set0[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_set0[2] <= second_set0[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
second_set0[3] <= second_set0[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
disp_drive[0] <= disp_drive[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
disp_drive[1] <= disp_drive[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
disp_drive[2] <= disp_drive[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE