alarmclock.fit.rpt

基于FPGA的多功能数字钟的设计与实现 内附有详尽的Verilog HDL源码

; second1[2]                            ; 2       ;
; minute0[0]                            ; 2       ;
; second1[3]                            ; 1       ;
; minute0[1]                            ; 1       ;
; minute0[2]                            ; 1       ;
; minute0[3]                            ; 1       ;
; minute1[0]                            ; 1       ;
; minute1[1]                            ; 1       ;
; minute1[2]                            ; 1       ;
; minute1[3]                            ; 1       ;
; hour0[0]                              ; 1       ;
; hour0[1]                              ; 1       ;
; hour0[2]                              ; 1       ;
; hour0[3]                              ; 1       ;
; hour1[0]                              ; 1       ;
; hour1[1]                              ; 1       ;
; hour1[2]                              ; 1       ;
; hour1[3]                              ; 1       ;
; always0~133                           ; 1       ;
+---------------------------------------+---------+


+------------------------------------------------+
; Interconnect Usage Summary                     ;
+----------------------------+-------------------+
; Interconnect Resource Type ; Usage             ;
+----------------------------+-------------------+
; Output enables             ; 0 / 6 ( 0 % )     ;
; PIA buffers                ; 75 / 144 ( 52 % ) ;
+----------------------------+-------------------+


+-----------------------------------------------------------------------+
; LAB Macrocells                                                        ;
+-----------------------------------------+-----------------------------+
; Number of Macrocells  (Average = 10.50) ; Number of LABs  (Total = 4) ;
+-----------------------------------------+-----------------------------+
; 0                                       ; 0                           ;
; 1                                       ; 1                           ;
; 2                                       ; 0                           ;
; 3                                       ; 0                           ;
; 4                                       ; 0                           ;
; 5                                       ; 0                           ;
; 6                                       ; 0                           ;
; 7                                       ; 0                           ;
; 8                                       ; 0                           ;
; 9                                       ; 0                           ;
; 10                                      ; 0                           ;
; 11                                      ; 0                           ;
; 12                                      ; 0                           ;
; 13                                      ; 2                           ;
; 14                                      ; 0                           ;
; 15                                      ; 1                           ;
+-----------------------------------------+-----------------------------+


+-------------------------------------------------------------------------------+
; Shareable Expander                                                            ;
+-------------------------------------------------+-----------------------------+
; Number of shareable expanders  (Average = 4.00) ; Number of LABs  (Total = 1) ;
+-------------------------------------------------+-----------------------------+
; 0                                               ; 3                           ;
; 1                                               ; 0                           ;
; 2                                               ; 0                           ;
; 3                                               ; 0                           ;
; 4                                               ; 0                           ;
; 5                                               ; 0                           ;
; 6                                               ; 0                           ;
; 7                                               ; 0                           ;
; 8                                               ; 0                           ;
; 9                                               ; 0                           ;
; 10                                              ; 0                           ;
; 11                                              ; 0                           ;
; 12                                              ; 0                           ;
; 13                                              ; 0                           ;
; 14                                              ; 0                           ;
; 15                                              ; 0                           ;
; 16                                              ; 1                           ;
+-------------------------------------------------+-----------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               ;
+-----+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input                                                                                                                                                                                                                                                                                                                                                                                                                                  ; Output                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       ;
+-----+------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
;  A  ; LC13       ; SW2, lpm_counter:second_set1_rtl_1|dffs[2], lpm_counter:second_set1_rtl_1|dffs[1], lpm_counter:second_set1_rtl_1|dffs[0], disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                                                                  ; lpm_counter:second_set1_rtl_1|dffs[1], lpm_counter:second_set1_rtl_1|dffs[2], lpm_counter:second_set1_rtl_1|dffs[0], always0~52sexp, always0~122                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             ;
;  A  ; LC15       ; SW2, lpm_counter:second_set1_rtl_1|dffs[0], lpm_counter:second_set1_rtl_1|dffs[1], lpm_counter:second_set1_rtl_1|dffs[2], disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                                                                  ; lpm_counter:second_set1_rtl_1|dffs[1], lpm_counter:second_set1_rtl_1|dffs[2], lpm_counter:second_set1_rtl_1|dffs[0], always0~60sexp, always0~124                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             ;
;  A  ; LC14       ; SW2, lpm_counter:second_set0_rtl_0|dffs[3], lpm_counter:second_set0_rtl_0|dffs[0], lpm_counter:second_set0_rtl_0|dffs[1], lpm_counter:second_set0_rtl_0|dffs[2], disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                           ; lpm_counter:second_set0_rtl_0|dffs[2], lpm_counter:second_set0_rtl_0|dffs[3], lpm_counter:second_set0_rtl_0|dffs[0], always0~44sexp, always0~120                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             ;
;  A  ; LC16       ; SW2, lpm_counter:second_set0_rtl_0|dffs[0], lpm_counter:second_set0_rtl_0|dffs[1], lpm_counter:second_set0_rtl_0|dffs[2], lpm_counter:second_set0_rtl_0|dffs[3], disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                           ; lpm_counter:second_set0_rtl_0|dffs[1], lpm_counter:second_set0_rtl_0|dffs[2], lpm_counter:second_set0_rtl_0|dffs[3], lpm_counter:second_set0_rtl_0|dffs[0], always0~48sexp, always0~121                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
;  A  ; LC7        ; SW2, lpm_counter:second_set0_rtl_0|dffs[0], lpm_counter:second_set0_rtl_0|dffs[3], lpm_counter:second_set0_rtl_0|dffs[1], lpm_counter:second_set0_rtl_0|dffs[2], disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                           ; lpm_counter:second_set0_rtl_0|dffs[1], lpm_counter:second_set0_rtl_0|dffs[2], lpm_counter:second_set0_rtl_0|dffs[3], lpm_counter:second_set0_rtl_0|dffs[0], always0~36sexp, always0~118                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
;  A  ; LC11       ; SW2, lpm_counter:second_set1_rtl_1|dffs[2], lpm_counter:second_set1_rtl_1|dffs[0], lpm_counter:second_set1_rtl_1|dffs[1], disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                                                                  ; lpm_counter:second_set1_rtl_1|dffs[1], lpm_counter:second_set1_rtl_1|dffs[2], lpm_counter:second_set1_rtl_1|dffs[0], always0~56sexp, always0~123                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             ;
;  A  ; LC8        ; SW2, lpm_counter:second_set0_rtl_0|dffs[3], lpm_counter:second_set0_rtl_0|dffs[0], lpm_counter:second_set0_rtl_0|dffs[1], disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                                                                  ; lpm_counter:second_set0_rtl_0|dffs[1], lpm_counter:second_set0_rtl_0|dffs[2], lpm_counter:second_set0_rtl_0|dffs[3], lpm_counter:second_set0_rtl_0|dffs[0], always0~40sexp, always0~119                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
;  A  ; LC1        ; clk_200hz, disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                                                                                                                                                                                 ; alarmclock_disp_select[0]                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
;  A  ; LC2        ; clk_200hz, disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                                                                                                                                                                                 ; alarmclock_disp_select[1]                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
;  A  ; LC3        ; clk_200hz, disp_drive[1], disp_drive[0], disp_drive[2]                                                                                                                                                                                                                                                                                                                                                                                 ; alarmclock_disp_select[3]                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
;  A  ; LC4        ; clk_200hz, disp_drive[1], disp_drive[0], disp_drive[2]                                                                                                                                                                                                                                                                                                                                                                                 ; alarmclock_disp_select[5]                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
;  A  ; LC5        ; clk_200hz, disp_drive[2], disp_drive[0], disp_drive[1]                                                                                                                                                                                                                                                                                                                                                                                 ; alarmclock_disp_select[2]                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
;  A  ; LC6        ; clk_200hz, disp_drive[0], disp_drive[2], disp_drive[1]                                                                                                                                                                                                                                                                                                                                                                                 ; alarmclock_disp_select[4]                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
;  B  ; LC28       ; lpm_counter:hour_set0_rtl_4|dffs[1], hour0[1]                                                                                                                                                                                                                                                                                                                                                                                          ; always0~117