📄 fdiv.tan.rpt
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; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[24] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[23] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[22] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[21] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[20] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[19] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[18] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[17] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[16] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[15] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[14] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[13] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[12] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[11] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[10] ; lpm_counter:CNT3_rtl_2|dffs[3] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[30] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[29] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[28] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[27] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[26] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[25] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[24] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[23] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[22] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[21] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[20] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[19] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[18] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[17] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[16] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[15] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[14] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[13] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[12] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; N/A ; 123.46 MHz ( period = 8.100 ns ) ; lpm_counter:CNT3_rtl_2|dffs[11] ; lpm_counter:CNT3_rtl_2|dffs[7] ; clk ; clk ; None ; None ; 5.700 ns ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------+--------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
+-----------------------------------------------------------------------+
; tco ;
+-------+--------------+------------+-------------+--------+------------+
; Slack ; Required tco ; Actual tco ; From ; To ; From Clock ;
+-------+--------------+------------+-------------+--------+------------+
; N/A ; None ; 10.400 ns ; f1hz~reg0 ; f1hz ; clk ;
; N/A ; None ; 10.400 ns ; f60hz~reg0 ; f60hz ; clk ;
; N/A ; None ; 4.000 ns ; f200hz~reg0 ; f200hz ; clk ;
+-------+--------------+------------+-------------+--------+------------+
+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
Info: Processing started: Sat Jul 15 19:33:21 2006
Info: Command: quartus_tan --import_settings_files=off --export_settings_files=off fdiv -c fdiv
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Warning: Found pins functioning as undefined clocks and/or memory enables
Info: Assuming node "clk" is an undefined clock
Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
Info: Detected ripple clock "f200hz~reg0" as buffer
Info: Clock "clk" has Internal fmax of 96.15 MHz b⌨️ 快捷键说明
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