vga_system.fit.summary

来自「verilog代码读写SDRAM 不带仿真」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Sat Mar 01 10:41:14 2008
Quartus II Version : 7.2 Build 203 02/05/2008 SP 2 SJ Full Version
Revision Name : vga_system
Top-level Entity Name : vga_system
Family : Cyclone II
Device : EP2C35F484C8
Timing Models : Final
Total logic elements : 5,135 / 33,216 ( 15 % )
    Total combinational functions : 4,635 / 33,216 ( 14 % )
    Dedicated logic registers : 2,917 / 33,216 ( 9 % )
Total registers : 3067
Total pins : 129 / 322 ( 40 % )
Total virtual pins : 0
Total memory bits : 90,048 / 483,840 ( 19 % )
Embedded Multiplier 9-bit elements : 4 / 70 ( 6 % )
Total PLLs : 1 / 4 ( 25 % )