.project

来自「verilog代码读写SDRAM 不带仿真」· PROJECT 代码 · 共 35 行

<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
	<name>altera.components</name>
	<comment></comment>
	<projects>
	</projects>
	<buildSpec>
	</buildSpec>
	<natures>
		<nature>org.eclipse.cdt.core.cnature</nature>
	</natures>
	<linkedResources>
		<link>
			<name>Nios II Software Packages</name>
			<type>2</type>
			<location>C:/altera/72/nios2eds/components</location>
		</link>
		<link>
			<name>Newlib C Library/src</name>
			<type>2</type>
			<location>C:/altera/72/nios2eds/bin/nios2-gnutools/src</location>
		</link>
		<link>
			<name>Newlib C Library/include</name>
			<type>2</type>
			<location>C:/altera/72/nios2eds/bin/nios2-gnutools/include</location>
		</link>
		<link>
			<name>IP Device Drivers</name>
			<type>2</type>
			<location>C:/altera/72/ip</location>
		</link>
	</linkedResources>
</projectDescription>