prev_cmp_vga_system.map.qmsg

verilog代码读写SDRAM 不带仿真

{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/altmult_add.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/altmult_add.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altmult_add " "Info: Found entity 1: altmult_add" {  } { { "altmult_add.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/altmult_add.tdf" 360 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altmult_add vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1 " "Info: Elaborating entity \"altmult_add\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1\"" {  } { { "cpu_mult_cell.v" "the_altmult_add_part_1" { Text "D:/FreeDevDAV/example/vga_system/cpu_mult_cell.v" 49 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1 " "Info: Elaborated megafunction instantiation \"vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1\"" {  } { { "cpu_mult_cell.v" "" { Text "D:/FreeDevDAV/example/vga_system/cpu_mult_cell.v" 49 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mult_add_4cr2.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mult_add_4cr2.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mult_add_4cr2 " "Info: Found entity 1: mult_add_4cr2" {  } { { "db/mult_add_4cr2.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/mult_add_4cr2.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mult_add_4cr2 vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1\|mult_add_4cr2:auto_generated " "Info: Elaborating entity \"mult_add_4cr2\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1\|mult_add_4cr2:auto_generated\"" {  } { { "altmult_add.tdf" "auto_generated" { Text "c:/altera/72/quartus/libraries/megafunctions/altmult_add.tdf" 535 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/ded_mult_2o81.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/ded_mult_2o81.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 ded_mult_2o81 " "Info: Found entity 1: ded_mult_2o81" {  } { { "db/ded_mult_2o81.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/ded_mult_2o81.tdf" 30 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ded_mult_2o81 vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1\|mult_add_4cr2:auto_generated\|ded_mult_2o81:ded_mult1 " "Info: Elaborating entity \"ded_mult_2o81\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1\|mult_add_4cr2:auto_generated\|ded_mult_2o81:ded_mult1\"" {  } { { "db/mult_add_4cr2.tdf" "ded_mult1" { Text "D:/FreeDevDAV/example/vga_system/db/mult_add_4cr2.tdf" 33 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/dffpipe_93c.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/dffpipe_93c.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 dffpipe_93c " "Info: Found entity 1: dffpipe_93c" {  } { { "db/dffpipe_93c.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/dffpipe_93c.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "dffpipe_93c vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1\|mult_add_4cr2:auto_generated\|ded_mult_2o81:ded_mult1\|dffpipe_93c:pre_result " "Info: Elaborating entity \"dffpipe_93c\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_1\|mult_add_4cr2:auto_generated\|ded_mult_2o81:ded_mult1\|dffpipe_93c:pre_result\"" {  } { { "db/ded_mult_2o81.tdf" "pre_result" { Text "D:/FreeDevDAV/example/vga_system/db/ded_mult_2o81.tdf" 50 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altmult_add vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_2 " "Info: Elaborating entity \"altmult_add\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_2\"" {  } { { "cpu_mult_cell.v" "the_altmult_add_part_2" { Text "D:/FreeDevDAV/example/vga_system/cpu_mult_cell.v" 89 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_2 " "Info: Elaborated megafunction instantiation \"vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_2\"" {  } { { "cpu_mult_cell.v" "" { Text "D:/FreeDevDAV/example/vga_system/cpu_mult_cell.v" 89 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mult_add_6cr2.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mult_add_6cr2.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mult_add_6cr2 " "Info: Found entity 1: mult_add_6cr2" {  } { { "db/mult_add_6cr2.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/mult_add_6cr2.tdf" 24 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mult_add_6cr2 vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_2\|mult_add_6cr2:auto_generated " "Info: Elaborating entity \"mult_add_6cr2\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_mult_cell:the_cpu_mult_cell\|altmult_add:the_altmult_add_part_2\|mult_add_6cr2:auto_generated\"" {  } { { "altmult_add.tdf" "auto_generated" { Text "c:/altera/72/quartus/libraries/megafunctions/altmult_add.tdf" 535 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_nios2_oci vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci " "Info: Elaborating entity \"cpu_nios2_oci\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\"" {  } { { "cpu.v" "the_cpu_nios2_oci" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 10004 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_nios2_oci_debug vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug " "Info: Elaborating entity \"cpu_nios2_oci_debug\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug\"" {  } { { "cpu.v" "the_cpu_nios2_oci_debug" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 3939 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_nios2_ocimem vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem " "Info: Elaborating entity \"cpu_nios2_ocimem\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem\"" {  } { { "cpu.v" "the_cpu_nios2_ocimem" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 3959 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_ociram_lpm_dram_bdp_component_module vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem\|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component " "Info: Elaborating entity \"cpu_ociram_lpm_dram_bdp_component_module\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem\|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component\"" {  } { { "cpu.v" "cpu_ociram_lpm_dram_bdp_component" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 1173 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem\|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component\|altsyncram:the_altsyncram " "Info: Elaborating entity \"altsyncram\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem\|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component\|altsyncram:the_altsyncram\"" {  } { { "cpu.v" "the_altsyncram" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 1024 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem\|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component\|altsyncram:the_altsyncram " "Info: Elaborated megafunction instantiation \"vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem\|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component\|altsyncram:the_altsyncram\"" {  } { { "cpu.v" "" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 1024 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_t072.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_t072.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_t072 " "Info: Found entity 1: altsyncram_t072" {  } { { "db/altsyncram_t072.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/altsyncram_t072.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_t072 vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem\|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component\|altsyncram:the_altsyncram\|altsyncram_t072:auto_generated " "Info: Elaborating entity \"altsyncram_t072\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_ocimem:the_cpu_nios2_ocimem\|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component\|altsyncram:the_altsyncram\|altsyncram_t072:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_nios2_avalon_reg vga_sys:inst1\|cpu:the_cpu\|cpu_nios2_oci:the_cpu_nios2_oci\|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg " "Info: Elaborating entity \"cp