prev_cmp_vga_system.map.qmsg

verilog代码读写SDRAM 不带仿真

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_cub1 vga_sys:inst1\|cpu:the_cpu\|cpu_ic_data_module:cpu_ic_data\|altsyncram:the_altsyncram\|altsyncram_cub1:auto_generated " "Info: Elaborating entity \"altsyncram_cub1\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_ic_data_module:cpu_ic_data\|altsyncram:the_altsyncram\|altsyncram_cub1:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_k1l1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_k1l1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_k1l1 " "Info: Found entity 1: altsyncram_k1l1" {  } { { "db/altsyncram_k1l1.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/altsyncram_k1l1.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_k1l1 vga_sys:inst1\|cpu:the_cpu\|cpu_ic_data_module:cpu_ic_data\|altsyncram:the_altsyncram\|altsyncram_cub1:auto_generated\|altsyncram_k1l1:altsyncram1 " "Info: Elaborating entity \"altsyncram_k1l1\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_ic_data_module:cpu_ic_data\|altsyncram:the_altsyncram\|altsyncram_cub1:auto_generated\|altsyncram_k1l1:altsyncram1\"" {  } { { "db/altsyncram_cub1.tdf" "altsyncram1" { Text "D:/FreeDevDAV/example/vga_system/db/altsyncram_cub1.tdf" 38 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_ic_tag_module vga_sys:inst1\|cpu:the_cpu\|cpu_ic_tag_module:cpu_ic_tag " "Info: Elaborating entity \"cpu_ic_tag_module\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_ic_tag_module:cpu_ic_tag\"" {  } { { "cpu.v" "cpu_ic_tag" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 7209 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram vga_sys:inst1\|cpu:the_cpu\|cpu_ic_tag_module:cpu_ic_tag\|altsyncram:the_altsyncram " "Info: Elaborating entity \"altsyncram\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_ic_tag_module:cpu_ic_tag\|altsyncram:the_altsyncram\"" {  } { { "cpu.v" "the_altsyncram" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 201 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "vga_sys:inst1\|cpu:the_cpu\|cpu_ic_tag_module:cpu_ic_tag\|altsyncram:the_altsyncram " "Info: Elaborated megafunction instantiation \"vga_sys:inst1\|cpu:the_cpu\|cpu_ic_tag_module:cpu_ic_tag\|altsyncram:the_altsyncram\"" {  } { { "cpu.v" "" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 201 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_mge1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_mge1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_mge1 " "Info: Found entity 1: altsyncram_mge1" {  } { { "db/altsyncram_mge1.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/altsyncram_mge1.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_mge1 vga_sys:inst1\|cpu:the_cpu\|cpu_ic_tag_module:cpu_ic_tag\|altsyncram:the_altsyncram\|altsyncram_mge1:auto_generated " "Info: Elaborating entity \"altsyncram_mge1\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_ic_tag_module:cpu_ic_tag\|altsyncram:the_altsyncram\|altsyncram_mge1:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_bht_module vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht " "Info: Elaborating entity \"cpu_bht_module\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht\"" {  } { { "cpu.v" "cpu_bht" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 7416 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht\|altsyncram:the_altsyncram " "Info: Elaborating entity \"altsyncram\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht\|altsyncram:the_altsyncram\"" {  } { { "cpu.v" "the_altsyncram" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 305 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht\|altsyncram:the_altsyncram " "Info: Elaborated megafunction instantiation \"vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht\|altsyncram:the_altsyncram\"" {  } { { "cpu.v" "" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 305 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_b4e1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_b4e1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_b4e1 " "Info: Found entity 1: altsyncram_b4e1" {  } { { "db/altsyncram_b4e1.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/altsyncram_b4e1.tdf" 26 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_b4e1 vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht\|altsyncram:the_altsyncram\|altsyncram_b4e1:auto_generated " "Info: Elaborating entity \"altsyncram_b4e1\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht\|altsyncram:the_altsyncram\|altsyncram_b4e1:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_abn1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_abn1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_abn1 " "Info: Found entity 1: altsyncram_abn1" {  } { { "db/altsyncram_abn1.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/altsyncram_abn1.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_abn1 vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht\|altsyncram:the_altsyncram\|altsyncram_b4e1:auto_generated\|altsyncram_abn1:altsyncram1 " "Info: Elaborating entity \"altsyncram_abn1\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_bht_module:cpu_bht\|altsyncram:the_altsyncram\|altsyncram_b4e1:auto_generated\|altsyncram_abn1:altsyncram1\"" {  } { { "db/altsyncram_b4e1.tdf" "altsyncram1" { Text "D:/FreeDevDAV/example/vga_system/db/altsyncram_b4e1.tdf" 38 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_register_bank_a_module vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_a_module:cpu_register_bank_a " "Info: Elaborating entity \"cpu_register_bank_a_module\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_a_module:cpu_register_bank_a\"" {  } { { "cpu.v" "cpu_register_bank_a" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 8037 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_a_module:cpu_register_bank_a\|altsyncram:the_altsyncram " "Info: Elaborating entity \"altsyncram\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_a_module:cpu_register_bank_a\|altsyncram:the_altsyncram\"" {  } { { "cpu.v" "the_altsyncram" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 409 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_a_module:cpu_register_bank_a\|altsyncram:the_altsyncram " "Info: Elaborated megafunction instantiation \"vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_a_module:cpu_register_bank_a\|altsyncram:the_altsyncram\"" {  } { { "cpu.v" "" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 409 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_l6e1.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_l6e1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_l6e1 " "Info: Found entity 1: altsyncram_l6e1" {  } { { "db/altsyncram_l6e1.tdf" "" { Text "D:/FreeDevDAV/example/vga_system/db/altsyncram_l6e1.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_l6e1 vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_a_module:cpu_register_bank_a\|altsyncram:the_altsyncram\|altsyncram_l6e1:auto_generated " "Info: Elaborating entity \"altsyncram_l6e1\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_a_module:cpu_register_bank_a\|altsyncram:the_altsyncram\|altsyncram_l6e1:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf" 918 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_register_bank_b_module vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_b_module:cpu_register_bank_b " "Info: Elaborating entity \"cpu_register_bank_b_module\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_b_module:cpu_register_bank_b\"" {  } { { "cpu.v" "cpu_register_bank_b" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 8060 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_b_module:cpu_register_bank_b\|altsyncram:the_altsyncram " "Info: Elaborating entity \"altsyncram\" for hierarchy \"vga_sys:inst1\|cpu:the_cpu\|cpu_register_bank_b_module:cpu_register_bank_b\|altsyncram:the_altsyncram\"" {  } { { "cpu.v" "the_altsyncram" { Text "D:/FreeDevDAV/example/vga_system/cpu.v" 513 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}