vga_system.map.rpt

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Analysis & Synthesis report for vga_system
Sat Mar 01 10:38:25 2008
Quartus II Version 7.2 Build 203 02/05/2008 Service Pack 2 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Analysis & Synthesis Source Files Read
  5. Analysis & Synthesis Resource Usage Summary
  6. Analysis & Synthesis Resource Utilization by Entity
  7. Analysis & Synthesis RAM Summary
  8. Analysis & Synthesis DSP Block Usage Summary
  9. State Machine - |vga_system|vga_sys:inst1|sdram:the_sdram|m_next
 10. State Machine - |vga_system|vga_sys:inst1|sdram:the_sdram|m_state
 11. State Machine - |vga_system|vga_sys:inst1|sdram:the_sdram|i_next
 12. State Machine - |vga_system|vga_sys:inst1|sdram:the_sdram|i_state
 13. State Machine - |vga_system|vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|current_state
 14. State Machine - |vga_system|vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1|DRsize
 15. Registers Protected by Synthesis
 16. Logic Cells Representing Combinational Loops
 17. Registers Removed During Synthesis
 18. Removed Registers Triggering Further Register Optimizations
 19. General Register Statistics
 20. Inverted Register Statistics
 21. Multiplexer Restructuring Statistics (Restructuring Performed)
 22. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_ic_data_module:cpu_ic_data|altsyncram:the_altsyncram|altsyncram_cub1:auto_generated
 23. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_ic_data_module:cpu_ic_data|altsyncram:the_altsyncram|altsyncram_cub1:auto_generated|altsyncram_k1l1:altsyncram1
 24. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_ic_tag_module:cpu_ic_tag|altsyncram:the_altsyncram|altsyncram_mge1:auto_generated
 25. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_bht_module:cpu_bht|altsyncram:the_altsyncram|altsyncram_b4e1:auto_generated
 26. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_bht_module:cpu_bht|altsyncram:the_altsyncram|altsyncram_b4e1:auto_generated|altsyncram_abn1:altsyncram1
 27. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram|altsyncram_l6e1:auto_generated
 28. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram|altsyncram_m6e1:auto_generated
 29. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_dc_tag_module:cpu_dc_tag|altsyncram:the_altsyncram|altsyncram_lde1:auto_generated
 30. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_dc_data_module:cpu_dc_data|altsyncram:the_altsyncram|altsyncram_uce1:auto_generated
 31. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_dc_data_module:cpu_dc_data|altsyncram:the_altsyncram|altsyncram_uce1:auto_generated|altsyncram_chp1:altsyncram1
 32. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_dc_victim_module:cpu_dc_victim|altsyncram:the_altsyncram|altsyncram_reb1:auto_generated
 33. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result
 34. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result
 35. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug
 36. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem
 37. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_t072:auto_generated
 38. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_break:the_cpu_nios2_oci_break
 39. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace
 40. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dtrace:the_cpu_nios2_oci_dtrace
 41. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_fifo:the_cpu_nios2_oci_fifo
 42. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im
 43. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated
 44. Source assignments for vga_sys:inst1|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module:the_cpu_jtag_debug_module1
 45. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component
 46. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated
 47. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|a_graycounter_ggc:wrptr_g1p
 48. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|a_graycounter_fgc:wrptr_gp
 49. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|altsyncram_ji01:fifo_ram
 50. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|altsyncram_ji01:fifo_ram|altsyncram_veb1:altsyncram3
 51. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|dffpipe_mcc:rdaclr
 52. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|dffpipe_pe9:rs_brp
 53. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|dffpipe_pe9:rs_bwp
 54. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|alt_synch_pipe_0e8:rs_dgwp
 55. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|alt_synch_pipe_0e8:rs_dgwp|dffpipe_qe9:dffpipe7
 56. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|dffpipe_pe9:ws_brp
 57. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|dffpipe_pe9:ws_bwp
 58. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|alt_synch_pipe_1e8:ws_dgrp
 59. Source assignments for vga_sys:inst1|freedev_vga_inst:the_freedev_vga_inst|freedev_vga:the_freedev_vga|vga_fifo:line_fifo|dcfifo:dcfifo_component|dcfifo_min1:auto_generated|alt_synch_pipe_1e8:ws_dgrp|dffpipe_re9:dffpipe10
 60. Source assignments for vga_sys:inst1|jtag_uart:the_jtag_uart
 61. Source assignments for vga_sys:inst1|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2
 62. Source assignments for vga_sys:inst1|jtag_uart:the_jtag_uart|jtag_uart_scfifo_r:the_jtag_uart_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2
 63. Source assignments for vga_sys:inst1|sdram:the_sdram
 64. Source assignments for vga_sys:inst1|tristate_bridge_avalon_slave_arbitrator:the_tristate_bridge_avalon_slave
 65. Source assignments for vga_sys:inst1|vga_sys_reset_clk_domain_synch_module:vga_sys_reset_clk_domain_synch
 66. Source assignments for sld_hub:sld_hub_inst
 67. Source assignments for sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG
 68. Parameter Settings for User Entity Instance: altpll0:inst|altpll:altpll_component
 69. Parameter Settings for User Entity Instance: vga_sys:inst1|cpu:the_cpu|cpu_ic_data_module:cpu_ic_data
 70. Parameter Settings for User Entity Instance: vga_sys:inst1|cpu:the_cpu|cpu_ic_data_module:cpu_ic_data|altsyncram:the_altsyncram
 71. Parameter Settings for User Entity Instance: vga_sys:inst1|cpu:the_cpu|cpu_ic_tag_module:cpu_ic_tag
 72. Parameter Settings for User Entity Instance: vga_sys:inst1|cpu:the_cpu|cpu_ic_tag_module:cpu_ic_tag|altsyncram:the_altsyncram
 73. Parameter Settings for User Entity Instance: vga_sys:inst1|cpu:the_cpu|cpu_bht_module:cpu_bht
 74. Parameter Settings for User Entity Instance: vga_sys:inst1|cpu:the_cpu|cpu_bht_module:cpu_bht|altsyncram:the_altsyncram