vga_system.fit.rpt
来自「verilog代码读写SDRAM 不带仿真」· RPT 代码 · 共 263 行 · 第 1/5 页
RPT
263 行
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[9] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[9] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src1[9]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[10] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[10] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src1[10]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[11] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[11] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src1[11]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[12] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[12] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src1[12]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[13] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[13] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src1[13]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[14] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[14] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src1[14]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[15] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[15] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src1[15]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[16] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[17] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[18] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[19] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[20] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[21] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[22] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[23] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[24] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[25] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[26] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[27] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[28] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[29] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[30] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src1[31] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAA ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[0] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[0] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src2[0]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[0]~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[1] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[1] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src2[1]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[1]~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[2] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[2] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src2[2]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[2]~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[3] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[3] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src2[3]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[3]~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[4] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[4] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src2[4]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[4]~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[5] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[5] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src2[5]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[5]~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[6] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[6] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src2[6]~_Duplicate_1 ; REGOUT ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[6]~_Duplicate_1 ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[7] ; Packed Register ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|cpu_mult_cell:the_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_mult2 ; DATAB ; ;
; vga_sys:inst1|cpu:the_cpu|A_mul_src2[7] ; Duplicated ; Register Packing ; Timing optimization ; REGOUT ; ; vga_sys:inst1|cpu:the_cpu|A_mul_src2[7]~_Duplicate_1 ; REGOUT ; ;
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