class.ptf

verilog代码读写SDRAM 不带仿真

               }
               TEXT 
               {
                  title = "Component name: freedev_i2c";
               }
               TEXT 
               {
                  title = "Component Group: User Logic";
               }
               GROUP parameters
               {
                  title = "Parameters";
                  layout = "form";
                  align = "left";
                  EDIT e1
                  {
                     id = "ARST_LVL";
                     editable = "1";
                     title = "ARST_LVL:";
                     columns = "40";
                     tooltip = "default value: 1'b0";
                     DATA 
                     {
                        $H/arst_lvl = "$";
                     }
                     q = "'";
                     warning = "{{ if(!(regexp('ugly_'+$H/arst_lvl,'ugly_[0-9]*'+$q+'[bB][01][_01]*')||regexp('ugly_'+$H/arst_lvl,'ugly_[0-9]*'+$q+'[hH][0-9a-fA-F][_0-9a-fA-F]*')||regexp('ugly_'+$H/arst_lvl,'ugly_[0-9]*'+$q+'[oO][0-7][_0-7]*')||regexp('ugly_'+$H/arst_lvl,'ugly_0x[0-9a-fA-F]+')||regexp('ugly_'+$H/arst_lvl,'ugly_-?[0-9]+')))'ARST_LVL must be numeric constant, not '+$H/arst_lvl; }}";
                  }
               }
            }
         }
      }
   }
   SOPC_Builder_Version = "5.10";
   COMPONENT_BUILDER 
   {
      HDL_PARAMETERS 
      {
         # generated by CBDocument.getParameterContainer
         # used only by Component Editor
         HDL_PARAMETER arst_lvl
         {
            parameter_name = "ARST_LVL";
            type = "integer";
            default_value = "1'b0";
            editable = "1";
            tooltip = "";
         }
      }
      SW_FILES 
      {
      }
      built_on = "2006.05.08.06:37:52";
      CACHED_HDL_INFO 
      {
         # cached hdl info, emitted by CBFrameRealtime.getDocumentCachedHDLInfoSection
         # used only by Component Builder
         FILE i2c_master_top.v
         {
            file_mod = "Mon May 08 06:34:42 CST 2006";
            quartus_map_start = "Mon May 08 06:35:46 CST 2006";
            quartus_map_finished = "Mon May 08 06:36:12 CST 2006";
            #found 1 valid modules
            WRAPPER i2c_master_top
            {
               CLASS i2c_master_top
               {
                  CB_GENERATOR 
                  {
                     HDL_FILES 
                     {
                        FILE 
                        {
                           use_in_simulation = "1";
                           use_in_synthesis = "1";
                           filepath = "D:/FreeDev2.1/test_i2c/freedev_i2c/i2c_master_top.v";
                        }
                     }
                     top_module_name = "i2c_master_top";
                     emit_system_h = "0";
                  }
                  MODULE_DEFAULTS global_signals
                  {
                     class = "i2c_master_top";
                     class_version = "1.0";
                     SYSTEM_BUILDER_INFO 
                     {
                        Instantiate_In_System_Module = "1";
                     }
                     SLAVE wb
                     {
                        SYSTEM_BUILDER_INFO 
                        {
                           Bus_Type = "avalon";
                        }
                        PORT_WIRING 
                        {
                           PORT wb_clk_i
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "clk";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                        }
                     }
                     SLAVE avalon_slave_0
                     {
                        SYSTEM_BUILDER_INFO 
                        {
                           Bus_Type = "avalon";
                        }
                        PORT_WIRING 
                        {
                           PORT arst_i
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wb_adr_i
                           {
                              width = "3";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wb_dat_i
                           {
                              width = "8";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wb_dat_o
                           {
                              width = "8";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wb_we_i
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wb_stb_i
                           {
                              width = "1";
                              width_expression = "";
                              direction = "input";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wb_ack_o
                           {
                              width = "1";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT wb_inta_o
                           {
                              width = "1";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT scl
                           {
                              width = "1";
                              width_expression = "";
                              direction = "inout";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT sda
                           {
                              width = "1";
                              width_expression = "";
                              direction = "inout";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                           PORT s_clk
                           {
                              width = "1";
                              width_expression = "";
                              direction = "output";
                              type = "export";
                              is_shared = "0";
                              vhdl_record_name = "";
                              vhdl_record_type = "";
                           }
                        }
                     }
                  }
                  USER_INTERFACE 
                  {
                     USER_LABELS 
                     {
                        name = "i2c_master_top";
                        technology = "imported components";
                     }
                  }
                  SOPC_Builder_Version = "0.0";
                  COMPONENT_BUILDER 
                  {
                     HDL_PARAMETERS 
                     {
                        # generated by CBDocument.getParameterContainer
                        # used only by Component Editor
                        HDL_PARAMETER arst_lvl
                        {
                           parameter_name = "ARST_LVL";
                           type = "integer";
                           default_value = "1'b0";
                           editable = "1";
                           tooltip = "";
                        }
                     }
                  }
               }
            }
         }
      }
   }
   ASSOCIATED_FILES 
   {
      Add_Program = "the_wizard_ui";
      Edit_Program = "the_wizard_ui";
      Generator_Program = "cb_generator.pl";
   }
}