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📄 dds.mfd

📁 本CD-ROM包括《Verilog-HDL实践与应用系统设计》一书中的全部例子
💻 MFD
📖 第 1 页 / 共 2 页
字号:
🔍
12 
IMPORTS | 1 | 3 | 2
EQ | 25 | 
    "DOUT<10>".T  =  "DATA<2>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * N60.FBK.LFBK * 
	N61.FBK.LFBK * "DOUT<2>".PIN
	+ "DATA<1>" * "DATA<2>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * 
	N60.FBK.LFBK * N61.FBK.LFBK * "DOUT<1>".PIN
	+ "DATA<1>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * N60.FBK.LFBK * 
	N61.FBK.LFBK * "DOUT<1>".PIN * "DOUT<2>".PIN
;Imported pterms FB4_3
	+ "DATA<0>" * "DATA<1>" * "DATA<2>" * 
	N55.FBK.LFBK * N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * 
	N59.FBK.LFBK * N60.FBK.LFBK * N61.FBK.LFBK * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<1>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * 
	N60.FBK.LFBK * N61.FBK.LFBK * "DOUT<2>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<2>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * 
	N60.FBK.LFBK * N61.FBK.LFBK * "DOUT<1>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * N60.FBK.LFBK * 
	N61.FBK.LFBK * "DOUT<1>".PIN * "DOUT<2>".PIN * "DOUT<0>".PIN
    "DOUT<10>".CLKF  =  MCLK.PIN
    "DOUT<10>".RSTF  =  /RB
    "DOUT<10>".PRLD  =  GND

MACROCELL | 3 | 15 | U3/Q_0
ATTRIBUTES | 8618768 | 0
OUTPUTMC | 5 | 0 | 4 | 3 | 14 | 3 | 15 | 3 | 0 | 3 | 6
INPUTS | 9 | N55.FBK.LFBK  | RB  | DOUT<2>".PIN  | DOUT<0>".PIN  | DATA<0>  | DOUT<1>".PIN  | DATA<1>  | DATA<2>  | U3/Q_0.FBK".LFBK
INPUTMC | 2 | 3 | 16 | 3 | 15
INPUTP | 7 | 11 | 7 | 86 | 26 | 3 | 27 | 91
EXPORTS | 1 | 3 | 14
EQ | 10 | 
    "U3/Q_0"  :=  /"U3/Q_0.FBK".LFBK
    "U3/Q_0".CLKF  =  CLK	;FCLK/GCK
    "U3/Q_0".RSTF  =  /RB
    "U3/Q_0".PRLD  =  GND
    U3/Q_0.EXP  =  "DATA<0>" * "DATA<1>" * "DATA<2>" * 
	N55.FBK.LFBK * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<1>" * N55.FBK.LFBK * 
	"DOUT<2>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * N55.FBK.LFBK * "DOUT<1>".PIN * 
	"DOUT<2>".PIN * "DOUT<0>".PIN
GLOBALS | 1 | 2 | CLK

MACROCELL | 3 | 0 | U3/Q_1
ATTRIBUTES | 4424464 | 0
OUTPUTMC | 3 | 0 | 4 | 3 | 0 | 3 | 6
INPUTS | 5 | U3/Q_1.FBK".LFBK  | U3/Q_2.FBK".LFBK  | MCLK.PIN  | RB  | U3/Q_0.FBK".LFBK
INPUTMC | 3 | 3 | 0 | 3 | 6 | 3 | 15
INPUTP | 2 | 12 | 11
EQ | 5 | 
   /"U3/Q_1".T  =  /"U3/Q_0.FBK".LFBK
	+ /"U3/Q_1.FBK".LFBK * /"U3/Q_2.FBK".LFBK * /MCLK.PIN
    "U3/Q_1".CLKF  =  CLK	;FCLK/GCK
    "U3/Q_1".RSTF  =  /RB
    "U3/Q_1".PRLD  =  GND
GLOBALS | 1 | 2 | CLK

MACROCELL | 3 | 6 | U3/Q_2
ATTRIBUTES | 4424464 | 0
OUTPUTMC | 3 | 0 | 4 | 3 | 7 | 3 | 0
INPUTS | 14 | U3/Q_1.FBK".LFBK  | N55.FBK.LFBK  | RB  | DOUT<2>".PIN  | DOUT<0>".PIN  | DATA<0>  | N56.FBK.LFBK  | N57.FBK.LFBK  | N58.FBK.LFBK  | N59.FBK.LFBK  | DOUT<1>".PIN  | DATA<2>  | DATA<1>  | U3/Q_0.FBK".LFBK
INPUTMC | 7 | 3 | 0 | 3 | 16 | 3 | 14 | 3 | 13 | 3 | 10 | 3 | 8 | 3 | 15
INPUTP | 7 | 11 | 7 | 86 | 26 | 3 | 91 | 27
EXPORTS | 1 | 3 | 7
EQ | 13 | 
    "U3/Q_2".T  =  "U3/Q_0.FBK".LFBK * "U3/Q_1.FBK".LFBK
    "U3/Q_2".CLKF  =  CLK	;FCLK/GCK
    "U3/Q_2".RSTF  =  /RB
    "U3/Q_2".PRLD  =  GND
    U3/Q_2.EXP  =  "DATA<0>" * "DATA<1>" * "DATA<2>" * 
	N55.FBK.LFBK * N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * 
	N59.FBK.LFBK * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<2>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * 
	"DOUT<1>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * "DOUT<1>".PIN * 
	"DOUT<2>".PIN * "DOUT<0>".PIN
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 4 | N62
ATTRIBUTES | 4686726 | 0
OUTPUTMC | 1 | 0 | 4
INPUTS | 5 | U3/Q_0  | U3/Q_1  | U3/Q_2  | RB  | N62.FBK.LFBK
INPUTMC | 4 | 3 | 15 | 3 | 0 | 3 | 6 | 0 | 4
INPUTP | 1 | 11
EQ | 5 | 
    MCLK.T  =  "U3/Q_0" * "U3/Q_1" * "U3/Q_2"
	+ "U3/Q_0" * /"U3/Q_1" * /"U3/Q_2" * /N62.FBK.LFBK
    MCLK.CLKF  =  CLK	;FCLK/GCK
    MCLK.SETF  =  /RB
    MCLK.PRLD  =  VCC
GLOBALS | 1 | 2 | CLK

MACROCELL | 1 | 12 | EXP0_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 13
INPUTS | 5 | N51.FBK.LFBK  | DATA<0>  | DATA<2>  | DATA<1>  | N53.FBK.LFBK
INPUTMC | 2 | 1 | 1 | 1 | 10
INPUTP | 3 | 26 | 91 | 27
EXPORTS | 1 | 1 | 13
EQ | 3 | 
       EXP0_.EXP  =  /"DATA<0>" * "DATA<2>" * /N53.FBK.LFBK
	+ /"DATA<1>" * "DATA<2>" * /N51.FBK.LFBK
	+ /"DATA<1>" * "DATA<2>" * /N53.FBK.LFBK

MACROCELL | 1 | 14 | EXP1_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 13
INPUTS | 4 | DATA<1>  | DATA<2>  | DATA<0>  | N53.FBK.LFBK
INPUTMC | 1 | 1 | 10
INPUTP | 3 | 27 | 91 | 26
EXPORTS | 1 | 1 | 13
EQ | 2 | 
       EXP1_.EXP  =  /"DATA<0>" * /"DATA<1>" * "DATA<2>"
	+ "DATA<1>" * /"DATA<2>" * N53.FBK.LFBK

MACROCELL | 3 | 2 | EXP2_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 1
INPUTS | 13 | DOUT<2>".PIN  | DOUT<0>".PIN  | DATA<0>  | N56.FBK.LFBK  | N57.FBK.LFBK  | N58.FBK.LFBK  | N59.FBK.LFBK  | N60.FBK.LFBK  | N61.FBK.LFBK  | DOUT<1>".PIN  | DATA<2>  | DATA<1>  | N55.FBK.LFBK
INPUTMC | 7 | 3 | 14 | 3 | 13 | 3 | 10 | 3 | 8 | 3 | 7 | 3 | 4 | 3 | 16
INPUTP | 6 | 7 | 86 | 26 | 3 | 91 | 27
EXPORTS | 1 | 3 | 1
EQ | 12 | 
       EXP2_.EXP  =  "DATA<0>" * "DATA<1>" * "DATA<2>" * 
	N55.FBK.LFBK * N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * 
	N59.FBK.LFBK * N60.FBK.LFBK * N61.FBK.LFBK * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<1>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * 
	N60.FBK.LFBK * N61.FBK.LFBK * "DOUT<2>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<2>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * 
	N60.FBK.LFBK * N61.FBK.LFBK * "DOUT<1>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * N60.FBK.LFBK * 
	N61.FBK.LFBK * "DOUT<1>".PIN * "DOUT<2>".PIN * "DOUT<0>".PIN

MACROCELL | 3 | 3 | EXP3_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 4
INPUTS | 11 | DOUT<0>".PIN  | DATA<0>  | N56.FBK.LFBK  | N57.FBK.LFBK  | N58.FBK.LFBK  | N59.FBK.LFBK  | N60.FBK.LFBK  | DOUT<1>".PIN  | DATA<2>  | DATA<1>  | N55.FBK.LFBK
INPUTMC | 6 | 3 | 14 | 3 | 13 | 3 | 10 | 3 | 8 | 3 | 7 | 3 | 16
INPUTP | 5 | 86 | 26 | 3 | 91 | 27
EXPORTS | 1 | 3 | 4
EQ | 6 | 
       EXP3_.EXP  =  "DATA<0>" * "DATA<1>" * "DATA<2>" * 
	N55.FBK.LFBK * N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * 
	N59.FBK.LFBK * N60.FBK.LFBK * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<2>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * 
	N60.FBK.LFBK * "DOUT<1>".PIN * "DOUT<0>".PIN

MACROCELL | 3 | 5 | EXP4_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 4
INPUTS | 11 | DOUT<2>".PIN  | DOUT<0>".PIN  | DATA<0>  | N56.FBK.LFBK  | N57.FBK.LFBK  | N58.FBK.LFBK  | N59.FBK.LFBK  | N60.FBK.LFBK  | DOUT<1>".PIN  | DATA<1>  | N55.FBK.LFBK
INPUTMC | 6 | 3 | 14 | 3 | 13 | 3 | 10 | 3 | 8 | 3 | 7 | 3 | 16
INPUTP | 5 | 7 | 86 | 26 | 3 | 27
EXPORTS | 1 | 3 | 4
EQ | 6 | 
       EXP4_.EXP  =  "DATA<0>" * "DATA<1>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * 
	N60.FBK.LFBK * "DOUT<2>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	N57.FBK.LFBK * N58.FBK.LFBK * N59.FBK.LFBK * N60.FBK.LFBK * 
	"DOUT<1>".PIN * "DOUT<2>".PIN * "DOUT<0>".PIN

MACROCELL | 3 | 9 | EXP5_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 8
INPUTS | 10 | DOUT<2>".PIN  | DOUT<0>".PIN  | N56.FBK.LFBK  | N57.FBK.LFBK  | N58.FBK.LFBK  | DOUT<1>".PIN  | DATA<1>  | DATA<0>  | DATA<2>  | N55.FBK.LFBK
INPUTMC | 4 | 3 | 14 | 3 | 13 | 3 | 10 | 3 | 16
INPUTP | 6 | 7 | 86 | 3 | 27 | 26 | 91
EXPORTS | 1 | 3 | 8
EQ | 14 | 
       EXP5_.EXP  =  "DATA<1>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	N57.FBK.LFBK * N58.FBK.LFBK * "DOUT<1>".PIN * "DOUT<2>".PIN
	+ "DATA<0>" * "DATA<1>" * "DATA<2>" * 
	N55.FBK.LFBK * N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * 
	"DOUT<0>".PIN
	+ "DATA<0>" * "DATA<1>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * "DOUT<2>".PIN * 
	"DOUT<0>".PIN
	+ "DATA<0>" * "DATA<2>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * N58.FBK.LFBK * "DOUT<1>".PIN * 
	"DOUT<0>".PIN
	+ "DATA<0>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	N57.FBK.LFBK * N58.FBK.LFBK * "DOUT<1>".PIN * "DOUT<2>".PIN * 
	"DOUT<0>".PIN

MACROCELL | 3 | 11 | EXP6_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 10
INPUTS | 9 | DOUT<2>".PIN  | DOUT<0>".PIN  | DATA<0>  | N56.FBK.LFBK  | N57.FBK.LFBK  | DOUT<1>".PIN  | DATA<2>  | DATA<1>  | N55.FBK.LFBK
INPUTMC | 3 | 3 | 14 | 3 | 13 | 3 | 16
INPUTP | 6 | 7 | 86 | 26 | 3 | 91 | 27
EXPORTS | 1 | 3 | 10
EQ | 8 | 
       EXP6_.EXP  =  "DATA<0>" * "DATA<1>" * "DATA<2>" * 
	N55.FBK.LFBK * N56.FBK.LFBK * N57.FBK.LFBK * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<1>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * "DOUT<2>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<2>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * N57.FBK.LFBK * "DOUT<1>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	N57.FBK.LFBK * "DOUT<1>".PIN * "DOUT<2>".PIN * "DOUT<0>".PIN

MACROCELL | 3 | 12 | EXP7_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 13
INPUTS | 8 | DOUT<2>".PIN  | DOUT<0>".PIN  | N56.FBK.LFBK  | DOUT<1>".PIN  | DATA<1>  | DATA<0>  | DATA<2>  | N55.FBK.LFBK
INPUTMC | 2 | 3 | 14 | 3 | 16
INPUTP | 6 | 7 | 86 | 3 | 27 | 26 | 91
EXPORTS | 1 | 3 | 13
EQ | 10 | 
       EXP7_.EXP  =  "DATA<1>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	"DOUT<1>".PIN * "DOUT<2>".PIN
	+ "DATA<0>" * "DATA<1>" * "DATA<2>" * 
	N55.FBK.LFBK * N56.FBK.LFBK * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<1>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * "DOUT<2>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * "DATA<2>" * N55.FBK.LFBK * 
	N56.FBK.LFBK * "DOUT<1>".PIN * "DOUT<0>".PIN
	+ "DATA<0>" * N55.FBK.LFBK * N56.FBK.LFBK * 
	"DOUT<1>".PIN * "DOUT<2>".PIN * "DOUT<0>".PIN

MACROCELL | 3 | 17 | EXP8_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 16
INPUTS | 6 | DOUT<2>".PIN  | DOUT<0>".PIN  | DATA<0>  | DATA<2>  | DATA<1>  | DOUT<1>".PIN
INPUTP | 6 | 7 | 86 | 26 | 91 | 27 | 3
EXPORTS | 1 | 3 | 16
EQ | 8 | 
       EXP8_.EXP  =  "DATA<0>" * "DATA<1>" * "DATA<2>" * 
	"DOUT<0>".PIN
	+ "DATA<0>" * "DATA<1>" * "DOUT<2>".PIN * 
	"DOUT<0>".PIN
	+ "DATA<0>" * "DATA<2>" * "DOUT<1>".PIN * 
	"DOUT<0>".PIN
	+ "DATA<0>" * "DOUT<1>".PIN * "DOUT<2>".PIN * 
	"DOUT<0>".PIN

PIN | RB | 0 | 1 | 64 | 15 | 1 | 10 | 1 | 13 | 1 | 1 | 3 | 16 | 3 | 14 | 3 | 13 | 3 | 10 | 3 | 8 | 3 | 7 | 3 | 4 | 3 | 1 | 3 | 15 | 3 | 0 | 3 | 6 | 0 | 4
PIN | DATA<0> | 0 | 14 | 64 | 16 | 1 | 10 | 1 | 13 | 1 | 1 | 3 | 15 | 3 | 13 | 3 | 12 | 3 | 9 | 3 | 5 | 3 | 6 | 3 | 3 | 1 | 14 | 1 | 12 | 3 | 2 | 3 | 8 | 3 | 11 | 3 | 17
PIN | DATA<1> | 0 | 16 | 64 | 21 | 1 | 10 | 1 | 13 | 3 | 16 | 3 | 14 | 3 | 13 | 3 | 10 | 3 | 8 | 3 | 7 | 3 | 4 | 3 | 1 | 1 | 12 | 1 | 14 | 3 | 2 | 3 | 3 | 3 | 5 | 3 | 6 | 3 | 9 | 3 | 11 | 3 | 12 | 3 | 15 | 3 | 17
PIN | DATA<2> | 1 | 8 | 64 | 19 | 1 | 13 | 3 | 16 | 3 | 14 | 3 | 13 | 3 | 10 | 3 | 8 | 3 | 7 | 3 | 4 | 3 | 1 | 1 | 12 | 1 | 14 | 3 | 2 | 3 | 3 | 3 | 6 | 3 | 9 | 3 | 11 | 3 | 12 | 3 | 15 | 3 | 17
PIN | CLK | 0 | 10 | 8192 | 4 | 3 | 15 | 3 | 0 | 3 | 6 | 0 | 4
PIN | DOUT<3> | 3 | 16 | 536871040
PIN | DOUT<4> | 3 | 14 | 536871040
PIN | DOUT<5> | 3 | 13 | 536871040
PIN | DOUT<6> | 3 | 10 | 536871040
PIN | DOUT<7> | 3 | 8 | 536871040
PIN | DOUT<8> | 3 | 7 | 536871040
PIN | DOUT<9> | 3 | 4 | 536871040
PIN | DOUT<10> | 3 | 1 | 536871040
PIN | DOUT<1> | 1 | 10 | 64 | 17 | 3 | 17 | 3 | 11 | 3 | 9 | 3 | 6 | 3 | 5 | 3 | 3 | 3 | 2 | 3 | 12 | 3 | 15 | 3 | 1 | 3 | 4 | 3 | 7 | 3 | 8 | 3 | 10 | 3 | 13 | 3 | 14 | 3 | 16
PIN | DOUT<2> | 1 | 13 | 64 | 16 | 3 | 16 | 3 | 17 | 3 | 15 | 3 | 12 | 3 | 11 | 3 | 9 | 3 | 6 | 3 | 5 | 3 | 2 | 3 | 1 | 3 | 4 | 3 | 7 | 3 | 8 | 3 | 10 | 3 | 13 | 3 | 14
PIN | DOUT<0> | 1 | 1 | 64 | 11 | 3 | 17 | 3 | 2 | 3 | 8 | 3 | 3 | 3 | 6 | 3 | 5 | 3 | 9 | 3 | 12 | 3 | 13 | 3 | 15 | 3 | 11
PIN | MCLK | 0 | 4 | 64 | 12 | 1 | 10 | 3 | 0 | 3 | 1 | 3 | 4 | 3 | 7 | 3 | 8 | 3 | 10 | 3 | 13 | 3 | 14 | 3 | 16 | 1 | 1 | 1 | 13
12

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