test_wave_gen_stx_beh.prj

32位单精度浮点加法器

verilog isim_temp "meta_harden.v"
verilog isim_temp "uart_tx_ctl.v"
verilog isim_temp "uart_rx_ctl.v"
verilog isim_temp "uart_baud_gen.v"
verilog isim_temp "to_bcd.v"
verilog isim_temp "reset_bridge.v"
verilog isim_temp "out_ddr_flop.v"
verilog isim_temp "debouncer.v"
verilog isim_temp "clk_div.v"
verilog isim_temp "uart_tx.v"
verilog isim_temp "uart_rx.v"
verilog isim_temp "samp_gen.v"
verilog isim_temp "rst_gen.v"
verilog isim_temp "resp_gen.v"
verilog isim_temp "lb_ctl.v"
verilog isim_temp "dac_spi.v"
verilog isim_temp "cmd_parse.v"
verilog isim_temp "clk_gen.v"
verilog isim_temp "clkx_bus.v"
verilog isim_temp "wave_gen.v"
verilog isim_temp "tb_uart_monitor.v"
verilog isim_temp "tb_uart_driver.v"
verilog isim_temp "tb_resp_checker.v"
verilog isim_temp "tb_resetgen.v"
verilog isim_temp "tb_ram.v"
verilog isim_temp "tb_fifo.v"
verilog isim_temp "tb_cmd_gen.v"
verilog isim_temp "tb_wave_gen.v"
verilog isim_temp "test_wave_gen.v"
verilog isim_temp "E:/xi14.2/14.2/ISE_DS/ISE//verilog/src/glbl.v"