coregen.cgp

来自「32位单精度浮点加法器」· CGP 代码 · 共 10 行

SET busformat = BusFormatAngleBracketNotRipped
SET designentry = Verilog
SET device = xc6slx45t
SET devicefamily = spartan6
SET flowvendor = Foundation_ISE
SET package = fgg484
SET speedgrade = -2
SET verilogsim = true
SET vhdlsim = true