clk_core.ucf

32位单精度浮点加法器

# file: clk_core.ucf
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# Input clock periods. These duplicate the values entered for the
#  input clocks. You can use these to time your system
#----------------------------------------------------------------
NET "CLK_IN1" TNM_NET = "CLK_IN1";
TIMESPEC "TS_CLK_IN1" = PERIOD "CLK_IN1" 37.037 ns HIGH 50% INPUT_JITTER 100.0ps;

# Derived clock periods. These are commented out because they are 
#   automatically propogated by the tools
# However, if you'd like to use them for module level testing, you 
#   can copy them into your module level timing checks
#-----------------------------------------------------------------
# NET "clk_int[1]" TNM_NET = "CLK_OUT1";
# TIMESPEC "TS_CLK_OUT1" = PERIOD "CLK_OUT1" 27.000 MHz;

# NET "clk_int[2]" TNM_NET = "CLK_OUT2";
# TIMESPEC "TS_CLK_OUT2" = PERIOD "CLK_OUT2" 27.000 MHz;