test_test.v

32位单精度浮点加法器

module float_add_module
 (
 input CLK, RSTn,
 input [31:0]A,B,
 output [31:0]Result,
input Start_Sig,
 output [3:0]Done_Sig,

 /*****************/
output [56:0]SQ_rA,SQ_rB,
 output [48:0]SQ_Temp,SQ_TempA,SQ_TempB,
 output [9:0]SQ_rExp,
 output [7:0]SQ_rExpDiff

 );
/**************************************/

 reg [3:0]i;
 reg [56:0]rA,rB; // [56]Sign, [55:48]Exponent, [47:46]Hidden Bit, [45:23]Mantissa [22:0]M'Backup
 reg [48:0]Temp; // [48]M'sign, [47:46]Hidden Bit, [45:23]M, [22:0]M'Backup
 reg [48:0]TempA,TempB; //[48]M'sign, [47:46]Hidden Bit, [45:23]M, [22:0]M'Backup
 reg [31:0]rResult;
 reg [9:0]rExp; //[9:8] Overflow or underflow check, [7:0] usuall exp.
 reg [7:0]rExpDiff; //Different between A.Exp and B.Exp
 reg isSign;
 reg isOver; // exp overflow error feedback
 reg isUnder; // exp underflow error feedback
 reg isZero; // m zero error feedback
 reg isDone;
always @ ( posedge CLK or negedge RSTn )
 if( !RSTn )
 begin
 i <= 4'd0;
 rA <= 57'd0;
 rB <= 57'd0;
 TempA <= 49'd0;
 TempB <= 49'd0;
  Temp <= 49'd0;
 rResult <= 32'd0;
  rExp <= 10'd0;
 rExpDiff <= 8'd0;
 isOver <= 1'b0;
  isUnder <= 1'b0;
  isZero <= 1'b0;
  isDone <= 1'b0;
  end
else if( Start_Sig )
  case( i )
 
  0: // Initial A,B and other reg.
  begin
  rA <= { A[31], A[30:23], 2'b01, A[22:0], 23'd0 };
  rB <= { B[31], B[30:23], 2'b01, B[22:0], 23'd0 };
 
  isOver <= 1'b0; isUnder <= 1'b0; isZero <= 1'b0;
  i <= i + 1'b1;
 end
 
  1: // if rExp[9..8] is 1, mean A.Exp small than B.Exp
  // while rExp[9..8] is 0, mean A.Exp large than B.Exp or same.
  begin
 rExp = A[30:23] - B[30:23];
   if( rExp[8] == 1 ) rExpDiff <= ~rExp[7:0] + 1'b1;
  else rExpDiff <= rExp[7:0];
  i <= i + 1'b1;
 end
2: // if A < B; A.M move and A.E = B.E, else opposite act;
  begin
  if( rExp[8] == 1 ) begin rA[47:0] <= rA[47:0] >> rExpDiff; rA[55:48] <= rB[55:48]; end
  else begin rB[47:0] <= rB[47:0] >> rExpDiff; rB[55:48] <= rA[55:48]; end
  i <= i + 1'b1;
  end

  3: // Modify TempA and TempB. with sign
  begin
 TempA <= rA[56] ? { rA[56], (~rA[47:0] + 1'b1) } : { rA[56], rA[47:0] };
  TempB <= rB[56] ? { rB[56], (~rB[47:0] + 1'b1) } : { rB[56], rB[47:0] };
 i <= i + 1'b1;
  end
 
  4: // Addition
  begin Temp <= TempA + TempB; i <= i + 1'b1; end
5: // modify result
  begin
  isSign <= Temp[48];
  if( Temp[48] == 1'b1) Temp <= ~Temp + 1'b1; // change M be postive
  rExp <= {2'b00, rA[55:48]}; // or rB[55:48] , change rExp withbe rA.Exp or rB.Exp
 i <= i + 1'b1;
  end
6: // Check M'hidden bit and modify to 2'b01
 begin
  if( Temp[47:46] == 2'b10 || Temp[47:46] == 2'b11) begin Temp <= Temp >> 1; rExp <= rExp + 1'b1; end
  else if( Temp[47:46] == 2'b00 && Temp[45] ) begin Temp <= Temp << 1; rExp <= rExp - 5'd1; end
  else if( Temp[47:46] == 2'b00 && Temp[44] ) begin Temp <= Temp << 2; rExp <= rExp - 5'd2; end
  else if( Temp[47:46] == 2'b00 && Temp[43] ) begin Temp <= Temp << 3; rExp <= rExp - 5'd3; end
  else if( Temp[47:46] == 2'b00 && Temp[42] ) begin Temp <= Temp << 4; rExp <= rExp - 5'd4; end
  else if( Temp[47:46] == 2'b00 && Temp[41] ) begin Temp <= Temp << 5; rExp <= rExp - 5'd5; end
  else if( Temp[47:46] == 2'b00 && Temp[40] ) begin Temp <= Temp << 6; rExp <= rExp - 5'd6; end
  else if( Temp[47:46] == 2'b00 && Temp[39] ) begin Temp <= Temp << 7; rExp <= rExp - 5'd7; end
  else if( Temp[47:46] == 2'b00 && Temp[38] ) begin Temp <= Temp << 8; rExp <= rExp - 5'd8; end
  else if( Temp[47:46] == 2'b00 && Temp[37] ) begin Temp <= Temp << 9; rExp <= rExp - 5'd9; end  else if( Temp[47:46] == 2'b00 && Temp[36] ) begin Temp <= Temp << 10; rExp <= rExp - 5'd10; end
  else if( Temp[47:46] == 2'b00 && Temp[35] ) begin Temp <= Temp << 11; rExp <= rExp - 5'd11; end
  else if( Temp[47:46] == 2'b00 && Temp[34] ) begin Temp <= Temp << 12; rExp <= rExp - 5'd12; end
  else if( Temp[47:46] == 2'b00 && Temp[33] ) begin Temp <= Temp << 13; rExp <= rExp - 5'd13; end
  else if( Temp[47:46] == 2'b00 && Temp[32] ) begin Temp <= Temp << 14; rExp <= rExp - 5'd14; end
  else if( Temp[47:46] == 2'b00 && Temp[31] ) begin Temp <= Temp << 15; rExp <= rExp - 5'd15; end
  else if( Temp[47:46] == 2'b00 && Temp[30] ) begin Temp <= Temp << 16; rExp <= rExp - 5'd16; end
  else if( Temp[47:46] == 2'b00 && Temp[29] ) begin Temp <= Temp << 17; rExp <= rExp - 5'd17; end
 else if( Temp[47:46] == 2'b00 && Temp[28] ) begin Temp <= Temp << 18; rExp <= rExp - 5'd18; end
  else if( Temp[47:46] == 2'b00 && Temp[27] ) begin Temp <= Temp << 19; rExp <= rExp - 5'd19; end
  else if( Temp[47:46] == 2'b00 && Temp[26] ) begin Temp <= Temp << 20; rExp <= rExp - 5'd20; end
  else if( Temp[47:46] == 2'b00 && Temp[25] ) begin Temp <= Temp << 21; rExp <= rExp - 5'd21; end
 else if( Temp[47:46] == 2'b00 && Temp[24] ) begin Temp <= Temp << 22; rExp <= rExp - 5'd22; end
  else if( Temp[47:46] == 2'b00 && Temp[23] ) begin Temp <= Temp << 23; rExp <= rExp - 5'd23; end
i <= i + 1'b1;
 end
7: //error check and format result in float format
 begin
  if( rExp[9:8] == 2'b01 ) begin isOver <= 1'b1; rResult <= {1'b0,8'd127, 23'd0}; end // E Overflow
 else if( rExp[9:8] == 2'b11 ) begin isUnder <= 1'b1; rResult <= {1'b0, 8'd127, 23'd0}; end // E Underflow
  else if( Temp[46:23] == 24'd0 ) begin isZero <= 1'b1; rResult <= {1'b0, 8'd127, 23'd0}; end // M Zero
 else if( Temp[22] == 1'b1 ) rResult <= { isSign, rExp[7:0], Temp[45:23] + 1'b1 }; // okay with normalised
  else rResult <= { isSign, rExp[7:0], Temp[45:23] }; // okay without normalise
  i <= i + 1'b1;
  end
 
  8:
 begin isDone <= 1'b1; i <= i + 1'b1; end
 
 9:
  begin isDone <= 1'b0; i <= 4'd0; end
 
  endcase
/**************************************/
 
  assign Done_Sig = { isOver, isUnder, isZero, isDone };
  assign Result = rResult;
 
  /***************************************/
 
  
 
  /****************************************/
 
  endmodule